Giovanni wrote:The general problem is: In an ISR epilogue how can I tell if the ISR is returning into normal code or into another ISR? The intrinsic used in the v6m port is bugged, it is done differently in v7m because that architecture has a dedicated status bit for this which is missing in M0.
Interesting, because I have an obscure bug which could be exactly that problem - except its on F767 using GCC V7.2.1, which should be OK. (And haven't seen the problem during more limited testing with other compiler versions). Is there any way to establish whether I have a compiler-created problem?