Please suggest how to understand what is going on and how to resolve issue.
I use STM32F4xx platform (STM32F427VI at 180 MHz), ChibiOS_16.1.5 and have issue with SPI data integrity at low bitrates.
Configuration and handling of SPI is following:
Code: Select all
SPIDriver *spi_drv_dac8562 = &SPID4;
void spi_cb_dac8562(SPIDriver *spip)
{
(void)spip;
chSysLockFromISR();
spiUnselectI(spi_drv_dac8562);
chSysUnlockFromISR();
}
SPIConfig spi_cfg_dac8562 = {
.end_cb = spi_cb_dac8562,
.ssport = GPIOB,
.sspad = GPIOB_DAC0_CS,
.cr1 = SPI_CR1_BR_1 | \
SPI_CR1_CPHA // 90 MHz / 4 = 11.25 MHz, SPI_MODE_1
};
void dac8562_en_vref(bool enable)
{
(void)enable;
uint8_t buf[3];
buf[0] = 0xAA;
buf[1] = 0x55;
buf[2] = 0x33;
spiSelect(spi_drv_dac8562);
spiStartSend(spi_drv_dac8562, ARRAY_ITEMS(buf), buf);
//while (spi_drv_dac8562->state != SPI_READY);
//spiUnselect(spi_drv_dac8562);
}
If bus speed is high (11.25 MHz), then data transmitted fine, but if I decrease bus speed for example to 351 KHz, then last byte (buf[2]) is zeroed always.
I've checked this issue with help of logical analyser.
P.S. I can't use busy-waiting by "while (spi_drv_dac8562->state != SPI_READY);" to unselect bus, because this broke device responsiveness/performance. Callback is much better solution for performance.
--
Igor