Yes interesting, when I will be back from vacations I will order two of those with the NAND modules, there is also an USB HS module that would allow me to integrate a patch waiting on the bug tracker for 2 years..
Giovanni
FSMC NAND
- Giovanni
- Site Admin
- Posts: 14444
- Joined: Wed May 27, 2009 8:48 am
- Location: Salerno, Italy
- Has thanked: 1074 times
- Been thanked: 921 times
- Contact:
Re: FSMC NAND
Hi Giovanni
Waht main goal of file os/hal/ports/STM32/STM32F4xx/stm32_rcc.h? Should I place there defines for FSMC or use defines provided by ST?
Waht main goal of file os/hal/ports/STM32/STM32F4xx/stm32_rcc.h? Should I place there defines for FSMC or use defines provided by ST?
- Giovanni
- Site Admin
- Posts: 14444
- Joined: Wed May 27, 2009 8:48 am
- Location: Salerno, Italy
- Has thanked: 1074 times
- Been thanked: 921 times
- Contact:
Re: FSMC NAND
Conventionally STM32 drivers never manipulate the RCC directly, just follow the pattern.
Giovanni
Giovanni
- sabdulqadir
- Posts: 49
- Joined: Fri Mar 23, 2018 7:29 pm
- Has thanked: 13 times
- Been thanked: 4 times
Re: FSMC NAND
Hi guys,
Thanks for the efforts to create an FMC driver. Appreciate it. I am trying to use this driver. I am having issues with the interrupt being generated by RB signal goes high.
Barthess,
Are you using FMC_WAIT signal, OR FMC_INT? I see multiple definitions of the RB signal.
&
Also why is this signal defined as INPUT and not as AF?
&
Is there any documentation available for this driver which explains the internal working?
Thanks for your time to view this.
AQ
Thanks for the efforts to create an FMC driver. Appreciate it. I am trying to use this driver. I am having issues with the interrupt being generated by RB signal goes high.
Barthess,
Are you using FMC_WAIT signal, OR FMC_INT? I see multiple definitions of the RB signal.
Code: Select all
#define GPIOD_NAND_RB_NWAIT 6
&
Code: Select all
#define GPIOG_NAND_RB1 6
#define GPIOG_NAND_RB2 7
Also why is this signal defined as INPUT and not as AF?
Code: Select all
#define VAL_GPIOD_MODER PIN_MODE_INPUT(GPIOD_NAND_RB_NWAIT) | \
&
Code: Select all
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_MEM_D2, 12) | \
PIN_AFIO_AF(GPIOD_MEM_D3, 12) | \
PIN_AFIO_AF(GPIOD_PIN2, 0) | \
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
PIN_AFIO_AF(GPIOD_MEM_OE, 12) | \
PIN_AFIO_AF(GPIOD_MEM_WE, 12) | \
PIN_AFIO_AF(GPIOD_NAND_RB_NWAIT, [color=#FF0000]0[/color]) | \
Is there any documentation available for this driver which explains the internal working?
Thanks for your time to view this.
AQ
Who is online
Users browsing this forum: No registered users and 5 guests