[patch] Added reset of SPIv2 on FIFO error
Posted: Sat Jul 27, 2019 12:08 pm
While testing a flight controller based on a STM32F765IIK6 we hit a problem in flight where SPI transactions from a MS5611 barometer went crazy. As this caused a crash we tried to reproduce the problem on the ground.
I found that the SPI peripheral (SPI4) can get into a bad state due to a momentary electrical glitch on the clock line. When this happens the FIFO appears as non-empty and all incoming transfers are corrupted (both with polled and DMA transfers).
I thought we could fix it by just draining the FIFO, but it doesn't help. So instead I have used the non-empty FIFO to trigger a reset using the RCC. This works nicely, and when I deliberately trigger the issue by shorting the SCK line to another pin the peripheral is automatically reset and the flight controller recovers.
Patch attached.
I found that the SPI peripheral (SPI4) can get into a bad state due to a momentary electrical glitch on the clock line. When this happens the FIFO appears as non-empty and all incoming transfers are corrupted (both with polled and DMA transfers).
I thought we could fix it by just draining the FIFO, but it doesn't help. So instead I have used the non-empty FIFO to trigger a reset using the RCC. This works nicely, and when I deliberately trigger the issue by shorting the SCK line to another pin the peripheral is automatically reset and the flight controller recovers.
Patch attached.