At present there's no way to control the bit which delays data sampling for half a clock in non-DDR mode - QUADSPI_CR_SSHIFT
Not certain whether it is set and forget, or whether it may need changing dependent on mode.
QSPI data read delay Topic is solved
- Giovanni
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Re: QSPI data read delay
Hi,
The QSPI driver probably needs an overhaul. Another limitation is that it is missing support for OSPI (octal) ports. Probably it should be renamed too (PSPI? MSPI?)
Changes to the flash driver should follow this.
Giovanni
The QSPI driver probably needs an overhaul. Another limitation is that it is missing support for OSPI (octal) ports. Probably it should be renamed too (PSPI? MSPI?)
Changes to the flash driver should follow this.
Giovanni
- Giovanni
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- Posts: 14457
- Joined: Wed May 27, 2009 8:48 am
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Re: QSPI data read delay
Hi,
I added the high level files for a new WSPI (wide) driver, it is much similar to QSPI but allows handling of an higher number of lines. This change should go in the LLD for the new driver (in queue).
Flash drivers and MFS will be ported to WSPI afterward.
Giovanni
I added the high level files for a new WSPI (wide) driver, it is much similar to QSPI but allows handling of an higher number of lines. This change should go in the LLD for the new driver (in queue).
Flash drivers and MFS will be ported to WSPI afterward.
Giovanni
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