STM32H7 ADCv4 patches Topic is solved
Posted: Sat Jul 04, 2020 9:10 am
Hi, I'm working on getting fixing/finalizing/testing the ADCv4 peripheral on STM32H7.
The progress is on https://github.com/pierstitus/ChibiOS/commits/adcv4
Things that have been fixed already:
- finishing ADC3 implementation
- making ADC12 dual mode work
- single conversions (with circular=false)
- clock calculation and BOOST register
Things to consider:
- Clock prescaler (PRESC register) is not taken into account for clock calculation and BOOST register. Doesn't seem to give problems, but good to know.
- ADC3 uses BDMA, hence the samples buffer must be in sram4.
There's still an issue with double buffering/half transfer interrupt, but that is something bigger, as it is also in ADCv2/STM32F4. I can post a separate bug report for that, though I just set the buffer depth to 1 to circumvent this issue.
I still want to do some more testing, and I think it would be nice to have these tests available in a structured way.
I often use the testhal projects as a start to try new peripherals, and think it would be useful to have a bit more extensive tests of the different possibilities.
I have tried to improve the multi ADC example (see viewtopic.php?p=38248), but think the ADCv4 deserves its own bit more extensive example, so I'd like to clean up the tests I did already and add them separately in testhal, how do you think about that?
The progress is on https://github.com/pierstitus/ChibiOS/commits/adcv4
Things that have been fixed already:
- finishing ADC3 implementation
- making ADC12 dual mode work
- single conversions (with circular=false)
- clock calculation and BOOST register
Things to consider:
- Clock prescaler (PRESC register) is not taken into account for clock calculation and BOOST register. Doesn't seem to give problems, but good to know.
- ADC3 uses BDMA, hence the samples buffer must be in sram4.
There's still an issue with double buffering/half transfer interrupt, but that is something bigger, as it is also in ADCv2/STM32F4. I can post a separate bug report for that, though I just set the buffer depth to 1 to circumvent this issue.
I still want to do some more testing, and I think it would be nice to have these tests available in a structured way.
I often use the testhal projects as a start to try new peripherals, and think it would be useful to have a bit more extensive tests of the different possibilities.
I have tried to improve the multi ADC example (see viewtopic.php?p=38248), but think the ADCv4 deserves its own bit more extensive example, so I'd like to clean up the tests I did already and add them separately in testhal, how do you think about that?