STM32G071 ADC calibration issue? Topic is solved

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jfilling
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STM32G071 ADC calibration issue?  Topic is solved

Postby jfilling » Tue Feb 18, 2020 7:38 am

I realize this is on the bleeding edge, but I'm curious if there is anyone else currently working on the STM32Gx series. I'm attempting to work my way through an issue that manifests itself as a hang during ADC calibration.

I initially noticed that if I enable the ADC (even without using it at all) via setting HAL_USE_ADC to TRUE in halconf.h that my system would hang. After stepping through the issue I discovered that in adc_lld_init (in os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c) my processor is waiting forever for the ADC calibration routing to finish running.

Code: Select all

diff --git a/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c
index 12620003c..30c990ed7 100644
--- a/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c
+++ b/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c
@@ -170,6 +170,7 @@ void adc_lld_init(void) {
    osalDbgAssert(ADC1->CR == 0, "invalid register state");
    ADC1->CR |= ADC_CR_ADCAL;
    osalDbgAssert(ADC1->CR != 0, "invalid register state");
+  // The below while loop hangs forever
    while (ADC1->CR & ADC_CR_ADCAL)
        ;
    rccDisableADC1();


I've attached a simple blinky program that will hang if you change HAL_USE_ADC to TRUE.

I'm currently developing with:

Hardware: NUCLEO-G071RB
Toolchain: 5.4.1 20160919
ChibiOS: master 4c56ee69c6918402d483e759b4d443c012ab5486
OpenOCD: Custom build to enable STM32G07xx (have also tested STM32 ST-LINK Utility on Windows)
Attachments
stm32g071_blinky.zip
(12.06 KiB) Downloaded 18 times

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Giovanni
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Re: STM32G071 ADC calibration issue?

Postby Giovanni » Tue Feb 18, 2020 7:55 am

Hi,

I had the very same issue with the G4 ADC, it went away by changing the ADC clock source from PLL to AHB, could try to do the same? If still have not found the root cause for this.

Giovanni

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Re: STM32G071 ADC calibration issue?

Postby jfilling » Tue Feb 18, 2020 8:34 am

I ran through all the settings for STM32_ADCSEL but no success just yet.

I'm looking through the rest of the clock settings to see if anything disagrees with the Clock Configuration from STM32CubeMX.

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Re: STM32G071 ADC calibration issue?

Postby Giovanni » Tue Feb 18, 2020 11:25 am

I will give it a try again tomorrow, thanks.

Giovanni

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Re: STM32G071 ADC calibration issue?

Postby jfilling » Wed Feb 19, 2020 6:42 am

I noticed a few minor differences between the recommended Clock Configuration coming from the STM32CubeMX tool and the "stock" cfg/mcuconf.h file for the STM32G071RB ADC example in the repository. I also tried those, but it still hangs in the same way.

I tried quite a few combinations of both versions of the mcusonf.h file and this is the one that I thought made the most sense. I have to admit that I have struggled with Clock Configuration in a few projects in the past, so my confidence is low here.

I tried all the variations of STM32_ADC_ADC1_CKMODE as well.

Code: Select all

diff --git a/stm32g071_blinky/cfg/mcuconf.h b/stm32g071_blinky/cfg/mcuconf.h
index ed1ab68..f0d83db 100644
--- a/stm32g071_blinky/cfg/mcuconf.h
+++ b/stm32g071_blinky/cfg/mcuconf.h
@@ -46,12 +46,12 @@
 #define STM32_HSE_ENABLED                   FALSE
 #define STM32_LSI_ENABLED                   TRUE
 #define STM32_LSE_ENABLED                   FALSE
-#define STM32_SW                            STM32_SW_PLLRCLK
+#define STM32_SW                            STM32_SW_HSISYS
 #define STM32_PLLSRC                        STM32_PLLSRC_HSI16
-#define STM32_PLLM_VALUE                    2
-#define STM32_PLLN_VALUE                    16
-#define STM32_PLLP_VALUE                    4
-#define STM32_PLLQ_VALUE                    4
+#define STM32_PLLM_VALUE                    1
+#define STM32_PLLN_VALUE                    8
+#define STM32_PLLP_VALUE                    2
+#define STM32_PLLQ_VALUE                    2
 #define STM32_PLLR_VALUE                    2
 #define STM32_HPRE                          STM32_HPRE_DIV1
 #define STM32_PPRE                          STM32_PPRE_DIV1
@@ -74,7 +74,7 @@
 #define STM32_TIM15SEL                      STM32_TIM15SEL_TIMPCLK
 #define STM32_RNGSEL                        STM32_RNGSEL_HSI16
 #define STM32_RNGDIV_VALUE                  1
-#define STM32_ADCSEL                        STM32_ADCSEL_PLLPCLK
+#define STM32_ADCSEL                        STM32_ADCSEL_HSI16
 #define STM32_RTCSEL                        STM32_RTCSEL_NOCLOCK


It might also be worth noting that the LDSCRIPT specified in that same ADC example seems incorrect.

Code: Select all

diff --git a/testhal/STM32/multi/ADC/make/stm32g071rb_nucleo64.make b/testhal/STM32/multi/ADC/make/stm32g071rb_nucleo64.make                index 49e338170..154a034d3 100644
--- a/testhal/STM32/multi/ADC/make/stm32g071rb_nucleo64.make
+++ b/testhal/STM32/multi/ADC/make/stm32g071rb_nucleo64.make
@@ -114,6 +114,7 @@ include $(CHIBIOS)/tools/mk/autobuild.mk
 #include $(CHIBIOS)/test/oslib/oslib_test.mk

 # Define linker script file here                                                                                                                                                                                                                                                                                                                                                     
-LDSCRIPT= $(STARTUPLD)/STM32L053x8.ld
+LDSCRIPT= $(STARTUPLD)/STM32G071xB.ld

 # C sources that can be compiled in ARM or THUMB mode depending on the global

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Re: STM32G071 ADC calibration issue?

Postby Giovanni » Wed Feb 19, 2020 9:17 am

Moving in "bug reports"-

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Re: STM32G071 ADC calibration issue?

Postby jfilling » Thu Feb 20, 2020 8:29 am

I have commented out the ADC calibration routine in adcInit and am dumping all the ADC registers to check the configuration values.

It seems that I am seeing non-zero values in the RCC register (and they track my settings, meaning that I can change them), but all zeros from the ADC registers. A few of the ADC registers actually reset to nonzero values (TR1, TR2, TR3) and even those come back as all 0. I attempted to write one of the registers to all ones and it seems the write does not take effect.

What would cause the ADC registers to all read back 0 and to not be writable. I did fire up a STM32CubeIDE project and was able to get the ADC up and running. In that design, the ADC registers are mostly non-zero.

Does any of this make sense?

Code: Select all

RCC->CR       0x00000500
RCC->ICSCR    0x0000408E
RCC->CFGR     0x00000000
RCC->PLLCFGR  0x00001000
RCC->CCIPR    0x84000405
RCC->CSR      0x1C000003
RCC->APBRSTR2 0x00000000

ADC1_BASE     0x40012400
ADC1->ISR     0x00000000
ADC1->IER     0x00000000
ADC1->CR      0x00000000
ADC1->CFGR1   0x00000000
ADC1->CFGR2   0x00000000
ADC1->SMPR    0x00000000
ADC1->TR1     0x00000000
ADC1->TR2     0x00000000
ADC1->CHSELR  0x00000000
ADC1->TR3     0x00000000
ADC1->DR      0x00000000
ADC1->AWD2CR  0x00000000
ADC1->AWD3CR  0x00000000
ADC1->CALFACT 0x00000000

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Re: STM32G071 ADC calibration issue?

Postby Giovanni » Thu Feb 20, 2020 9:49 am

Hi,

I found the reason, on the G0 the ADVREGEN bit has to be handled in SW, it was raised automatically in F0 and L0. I will commit updated code later.

The problem is to find a reliable way to insert a 20uS delay after enabling the regulator and before performing the calibration.

Giovanni

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Re: STM32G071 ADC calibration issue?

Postby Giovanni » Thu Feb 20, 2020 10:39 am

Change committed, it appears to work now.

Note, mcuconf.h has been updated.

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Re: STM32G071 ADC calibration issue?

Postby jfilling » Fri Feb 21, 2020 5:18 am

I pulled those changes and am happy to report that I can now collect ADC samples on a NUCLEO-STM32G071RB.

I'm actually in the middle of the process of bringing up a custom design with the STM32G071 and will continue to test additional functions.

Thank you for the assistance, I greatly appreciate it.


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