Cache-related problem in some STM32 HAL drivers

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Cache-related problem in some STM32 HAL drivers

Postby Giovanni » Fri Jan 11, 2019 12:10 pm


Putting this here to keep track.

Several LLDs have DMA-accessible buffers inside the driver structure, this is a problem on those devices where cache coherency must be handled.

Required action: move all buffers outside the driver structure, replace those with a pointer to the actual buffer which should be aligned to cache lines.


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