1. Timer 3 reset, enable etc not present in stm32_rcc.h
2. GPT21/22 not handled in hal_lld_gpt.h (have individual interrupt vectors). (Reports 'no timer enabled' if just timer 21 or 22 enabled)
But their reset/enable functions are in stm32_rcc.h!
32L0XX timers Topic is solved
Re: 32L0XX timers
I've been looking a bit more into timers on the 32L071, and thought it might be helpful to summarise what I've found. (I've not changed any files - haven't dug that deeply yet)
a) In respect of tim_irq_mapping.txt
Timers 2, 3, 6, 7, 21, 22 all have unique interrupts
b) Timers 2, 3
Timer 3 enable/disable/reset macros are missing from stm32_rcc.h
c) Timers 6, 7
Not mentioned in the mcuconf.h for the L073 demo project
Compiles OK if they are added
d) Timers 21,22
The macros in hal_gpt_lld.h don't support - both specific timer checks, the check to ensure at least one timer is enabled when the GPT subsystem is enabled, and the IRQ priority check
Status blocks in hal_gpt_lld.h need to be defined
(Superficially they have the same functionality as TIM2, TIM3, with 2 channels instead of four)
(I note that timer 21 is used for Systick)
e) General
All timer definitions in the registry makes sense (but 32L071/072 need cloning/adapting from L073)
In gpt_lld_serve_interrupt(), in one-shot mode, while calling gpt_lld_stop_timer() makes the action obvious, it would be noticeably faster (I assume) to replace that call with the two register updates done in gpt_lld_stop_timer().
(And would use of the timer's one-shot bit help here?)
a) In respect of tim_irq_mapping.txt
Timers 2, 3, 6, 7, 21, 22 all have unique interrupts
b) Timers 2, 3
Timer 3 enable/disable/reset macros are missing from stm32_rcc.h
c) Timers 6, 7
Not mentioned in the mcuconf.h for the L073 demo project
Compiles OK if they are added
d) Timers 21,22
The macros in hal_gpt_lld.h don't support - both specific timer checks, the check to ensure at least one timer is enabled when the GPT subsystem is enabled, and the IRQ priority check
Status blocks in hal_gpt_lld.h need to be defined
(Superficially they have the same functionality as TIM2, TIM3, with 2 channels instead of four)
(I note that timer 21 is used for Systick)
e) General
All timer definitions in the registry makes sense (but 32L071/072 need cloning/adapting from L073)
In gpt_lld_serve_interrupt(), in one-shot mode, while calling gpt_lld_stop_timer() makes the action obvious, it would be noticeably faster (I assume) to replace that call with the two register updates done in gpt_lld_stop_timer().
(And would use of the timer's one-shot bit help here?)
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Re: 32L0XX timers
Excellent!
While you're on the L0XX, it would be nice to have a 'proper' way of accessing the on-board EEPROM. I've attached my working files (there's a test project somewhere on the forum).
Main thing I'd like to see done properly are the scatter files. They work, but I'm sure they could be better.
While you're on the L0XX, it would be nice to have a 'proper' way of accessing the on-board EEPROM. I've attached my working files (there's a test project somewhere on the forum).
Main thing I'd like to see done properly are the scatter files. They work, but I'm sure they could be better.
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- eeprom.zip
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- Giovanni
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Re: 32L0XX timers
Bumped. I still need to look into the EEPROM code.
Last bumped by Giovanni on Sat May 23, 2020 9:14 am.
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