Priority order violation - Asserion fails Topic is solved

Report here problems in any of ChibiOS components. This forum is NOT for support.
User avatar
Giovanni
Site Admin
Posts: 14444
Joined: Wed May 27, 2009 8:48 am
Location: Salerno, Italy
Has thanked: 1074 times
Been thanked: 921 times
Contact:

Re: Priority order violation - Asserion fails

Postby Giovanni » Sat Mar 16, 2019 4:58 pm

After thinking about this, adding a counter would not work, an ISR could be preempted by another ISR before the counter is increased and that would trigger another problem.

A possible solution could be to use PendSV, placed at lowest priority, as tail IRQ when a preemption is required but the risk is to decrease performance, I need to think about this.

The best approach so far is to document that ISRs without OS macros must be placed at higher priority than any ISR interacting with the OS.

Giovanni

User avatar
Giovanni
Site Admin
Posts: 14444
Joined: Wed May 27, 2009 8:48 am
Location: Salerno, Italy
Has thanked: 1074 times
Been thanked: 921 times
Contact:

Re: Priority order violation - Asserion fails

Postby Giovanni » Sun Mar 31, 2019 9:28 am

Hi,

As solution for this kind of issues I added this new article: http://www.chibios.org/dokuwiki/doku.ph ... texm_notes

Giovanni


Return to “Bug Reports”

Who is online

Users browsing this forum: No registered users and 8 guests