the change to remove lowpower config from RCC clockdisable macros e.g. leads to a non working can interface.
From RM0385
RCC APB1 peripheral clock enable in low-power mode register
(RCC_APB1LPENR)
Address offset: 0x60
Reset value: 0xFFFF CBFFh
So the default is that all hardware units get clock in sleep mode.
The old code did not touch the lpenr registers.
rccEnablexxx
if (lp) \
RCC->xxxLPENR |= (mask);
rccDisablexxx
if (lp) \
RCC->xxxLPENR &= ~(mask);
But the now the bit is cleared in the lpenr register if rccdisable is called - like in the setup of the can hardware.
#define rccDisablexxx(mask) { \
RCC->xxxENR &= ~(mask); \
RCC->xxxLPENR &= ~(mask);
best regards
nicolas