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886 /**
887 * @brief System clock source.
888 */
889 #if STM32_NO_INIT || defined(__DOXYGEN__)
890 #define STM32_SYSCLK 2100000
891 #elif (STM32_SW == STM32_SW_MSI)
892 #define STM32_SYSCLK STM32_MSICLK
893 #elif (STM32_SW == STM32_SW_HSI16)
894 #define STM32_SYSCLK STM32_HSI16CLK
895 #elif (STM32_SW == STM32_SW_HSE)
896 #define STM32_SYSCLK STM32_HSECLK
897 #elif (STM32_SW == STM32_SW_PLL)
898 #define STM32_SYSCLK STM32_PLLCLKOUT
900 #else
901 #error "invalid STM32_SW value specified"
902 #endif
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The line 894 must be :
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#define STM32_SYSCLK STM32_HSI16DIVCLK
This need for the option "STM32_HSI16_DIVIDER_ENABLED TRUE".