in file os/hal/ports/STM32/STM32L0xx/hal_lld.h there is an error in definition of STM32_RTCPRE_DIVx constants:
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124 /**
125 * @name RCC_CR register bits definitions
126 * @{
127 */
128 #define STM32_RTCPRE_MASK (3 << 29) /**< RTCPRE mask. */
129 #define STM32_RTCPRE_DIV2 (0 << 29) /**< HSE divided by 2. */
130 #define STM32_RTCPRE_DIV4 (1 << 29) /**< HSE divided by 4. */
131 #define STM32_RTCPRE_DIV8 (2 << 29) /**< HSE divided by 2. */
132 #define STM32_RTCPRE_DIV16 (3 << 29) /**< HSE divided by 16. */
133/** @} */
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The reference manual on page 178 says:
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Bits 21:20 RTCPRE[1:0] RTC prescaler
These bits are set and reset by software to obtain a 1 MHz clock from HSE. This prescaler
cannot be modified if HSE is enabled (HSEON = 1).These bits are reset by a power -on
reset,. Their value is not modified by a system reset.
Thus the correct definiition must be:
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124 /**
125 * @name RCC_CR register bits definitions
126 * @{
127 */
128 #define STM32_RTCPRE_MASK (3 << 20) /**< RTCPRE mask. */
129 #define STM32_RTCPRE_DIV2 (0 << 20) /**< HSE divided by 2. */
130 #define STM32_RTCPRE_DIV4 (1 << 20) /**< HSE divided by 4. */
131 #define STM32_RTCPRE_DIV8 (2 << 20) /**< HSE divided by 2. */
132 #define STM32_RTCPRE_DIV16 (3 << 20) /**< HSE divided by 16. */
133/** @} */
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