In F4, 9-bit mode is set by setting the bit USART_CR1_M,
but in F7, 9-bit mode is set by setting the bit USART_CR1_M_0 and clearing the bit USART_CR1_M_1
Therefore the checking condition is wrong,
In ./ChibiOS/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c:
/* Static DMA setup, the transfer size depends on the USART settings,
it is 16 bits if M=1 and PCE=0 else it is 8 bits.*/
if ((uartp->config->cr1 & (USART_CR1_M | USART_CR1_PCE)) == USART_CR1_M)
--> should be corrected as
/* Static DMA setup, the transfer size depends on the USART settings,
it is 16 bits if M0=1, M1 = 0 and PCE=0 else it is 8 bits.*/
if ((uartp->config->cr1 & (USART_CR1_M | USART_CR1_PCE)) == USART_CR1_M_0)
