file ch3\os\hal\ports\STM32\STM32L0xx\hal_lld.h:
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270 #define STM32_LPTIM1SEL_MASK (3 << 18) /**< LPTIM1 clock source mask. */
271 #define STM32_LPTIM1SEL_APB (0 << 18) /**< LPTIM1 clock is APB. */
272 #define STM32_LPTIM1SEL_SYSCLK (1 << 18) /**< LPTIM1 clock is SYSCLK. */
273 #define STM32_LPTIM1SEL_HSI16 (2 << 18) /**< LPTIM1 clock is HSI16. */
274 #define STM32_LPTIM1SEL_LSE (3 << 18) /**< LPTIM1 clock is LSE. */
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STM32L053 has following settings:
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Bits 19:18 LPTIM1SEL: Low-power Timer clock source selection bits
This bit is set and cleared by software.
00: APB clock selected as LP Timer clock
01: LSI clock selected as LP Timer clock
10: HSI16 clock selected as LP Timer clock
11: LSE clock selected as LP Timer clock
Ie line 272 is wrong and must be
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272 #define STM32_LPTIM1SEL_LSI (1 << 18) /**< LPTIM1 clock is LSI. */
May be other L0xx serias MCU has another settings but for the L053 it is.
