[NOTE] Things nice to have

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steved
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Re: [NOTE] Things nice to have

Postby steved » Wed Aug 16, 2017 1:46 pm

Thargon wrote:I know, but that is still quite cumbersome imo. I would hope that there is a better way than using explicit compiler directives, like

Simplification is only a few #defines away; for example I have:

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#define CACHE_ALIGN         __attribute__((aligned (32))) __attribute__((section(".ram0")))
#define CACHE_ALIGN_ZERO    __attribute__((aligned (32))) __attribute__((section(".bss")))
#define CACHE_NONE          __attribute__((section(".ram3")))

The section names need to lead to definitions in the scatter file.

You then use them in much the way you envisaged:

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CACHE_NONE uint8_t shortMessageBuffers[SHORT_MESSAGE_COUNT][SHORT_MESSAGE_MAX_LEN + 2] = { { 0 } };


I'd certainly like to see some standard Chibi memory-related definitions; possibly by type of memory rather than anything else (e.g. cached/non-cached, EEPROM, fast/slow etc)

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Re: [NOTE] Things nice to have

Postby faisal » Thu Apr 11, 2019 4:01 pm

Now that the latest kernels and HAL are released, I suggest starting a new thread with ideas for the next significant releases.

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Giovanni
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Re: [NOTE] Things nice to have

Postby Giovanni » Thu Apr 11, 2019 5:37 pm

We can continue here, there are still things in this thread that I need to consider.

About my personal ideas, things I want to do:

- New multi-core kernel or multi core mode in RT.
- Security kernel running in trust zone for new Cortex-M33, threads could be both in secure and non-secure spaces. This implies kernel separation from the application and a true API protocol for entry.
- C++ HAL prototype, not meant to replace current one.
- Add new features to OSLIB, even higher level.

In general, more new things.

Giovanni


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