[DEV] STM32G4xx support

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Re: [DEV] STM32G4xx support

Postby Giovanni » Tue Feb 18, 2020 3:18 pm

FXCoder wrote:Alex,
The BRR assert is a minor pending fix to be applied.
viewtopic.php?f=35&t=5378
--
Bob


That has been done, the prescaler thing is a new feature in USART apparently.

Giovanni

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Re: [DEV] STM32G4xx support

Postby Giovanni » Sat Feb 22, 2020 9:14 am

Giovanni wrote:STM32G473 is not defined in registry, I don't have one to test. You could add it and give feedback about it.

Giovanni


I added the missing definitions to registry, it should be fine now.

Giovanni

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Re: [DEV] STM32G4xx support

Postby tzarc » Sun Mar 01, 2020 7:22 am

Giovanni wrote:ADCv3 is now functional and there is a demo. FDCAN should be next.

Is anybody able to test the USB driver on G4?

Giovanni


Confirmed that USB is working fine on both G431 and G474, using QMK keyboard firmware retargeted to ChibiOS master.
Also confirmed that the updater scripts work perfectly fine for both!

EDIT: I spoke too soon, the latest copy of master has incorrect updater scripts.
I gather it'd be fine to accept some fixes and/or scripts for new MCU's? I'd planned to get F072/F103 looked at for QMK... worth writing and upstreaming?

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Re: [DEV] STM32G4xx support

Postby Giovanni » Sun Mar 01, 2020 8:16 am

Hi,

Thanks for confirming that USB works, about scripts, you can post a patch or just specify the problem.

Giovanni

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Re: [DEV] STM32G4xx support

Postby Giovanni » Fri Mar 06, 2020 2:50 pm

julester23 wrote:I made some improvements to the FDCAN driver to handle multiple peripherals and was able to test it on the EVAL board. Latest branch includes the older work and also the newer here: https://github.com/julienrhodes/ChibiOS ... n_g474eval


Hello, finally I am back to FDCAN.

I imported your driver but had to make some changes:

1) Configuration structure changed in order to make it more register-oriented like other drivers.
2) Moved some definition to registry in order to accommodate also H7 and future other devices.
3) Added support for FIFO1, it was partially done apparently.
4) Implemented ISRs outside the driver according to the latest "style".
5) Made can_lld_start() return a success status, this is currently not used but HLL HAL will support this in next versions as a safety enhancement.
6) Minor others.

I don't know this peripheral well so I would appreciate some help in reviewing and testing. Note that I test-compiled on an H7, if you want to try it on a G4 you need to add the new definitions to the registry.

This is for H7:

Registry (some of those do not apply to G4, place those to zero):

Code: Select all

/* CAN attributes.*/
#define STM32_HAS_FDCAN1                    TRUE
#define STM32_HAS_FDCAN2                    TRUE
#define STM32_FDCAN_FLS_NBR                 128U
#define STM32_FDCAN_FLE_NBR                 128U
#define STM32_FDCAN_RF0_NBR                 64U
#define STM32_FDCAN_RF1_NBR                 64U
#define STM32_FDCAN_RB_NBR                  64U
#define STM32_FDCAN_TEF_NBR                 32U
#define STM32_FDCAN_TB_NBR                  32U
#define STM32_FDCAN_TM_NBR                  64U


mcuconf.h:

Code: Select all


/*
 * IRQ system settings.
 */
#define STM32_IRQ_FDCAN1_PRIORITY           10
#define STM32_IRQ_FDCAN2_PRIORITY           10

/*
 * CAN driver system settings.
 */
#define STM32_CAN_USE_FDCAN1                TRUE
#define STM32_CAN_USE_FDCAN2                FALSE


The following is still missing:
- Sleep/wakeup.
- Full errors management.
- TX and RX buffers not supported, just queues currently.
- Filters.

Let's (re)introduce the above one by one after testing the core part.

Giovanni

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Re: [DEV] STM32G4xx support

Postby Shevchenko » Tue Mar 17, 2020 2:35 pm

There are errors on the github repository in the FDCAN driver.
1. In file
ChibiOS/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h
in CANConfig need to replace the DBTP with NBTP. And a similar replace in the file hal_can_lld.c in function can_lld_start().

2. In file hal_can_lld.h struct in the CANRxFrame structure, the union must contain header32 as well as CANTxFrame

3. In file hal_can_lld.c the function fdcan_clock_stop() should look like this

Code: Select all

static bool fdcan_clock_stop(CANDriver *canp) {
  systime_t start, end;

  /* Requesting clock stop then waiting for it to happen.*/
  canp->fdcan->CCCR |= FDCAN_CCCR_CSR;
  start = osalOsGetSystemTimeX();
  end = osalTimeAddX(start, TIME_MS2I(TIMEOUT_INIT_MS));
  while ((canp->fdcan->CCCR & FDCAN_CCCR_CSA) != 0U) {
    if (!osalTimeIsInRangeX(osalOsGetSystemTimeX(), start, end)) {
      return true;
    }
    osalThreadSleepS(1);
  }
  return false;
}

4. in file hal_can_lld.c function can_lld_transmit() must contain at end

Code: Select all

canp->fdcan->TXBAR = ((uint32_t)1 << mailbox);

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Re: [DEV] STM32G4xx support

Postby Giovanni » Sat Mar 21, 2020 9:19 am

Hi Shevchenko,

Could you help me? About your points:

1) I believe that both DBTP and NBTP are required, I added NBTP as you suggested.

2) Not clear, could you explain? or just post your code.

3) The function is already like that, is there some other change to do?

4) Done.

@Julester23, any comment?

Giovanni

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Re: [DEV] STM32G4xx support

Postby Shevchenko » Mon Mar 23, 2020 9:48 am

2)

Code: Select all

typedef struct {
  /**
   * @brief   Frame header.
   */
  union {
    struct {
      union {
        uint32_t              EID:29;     /**< @brief Extended Identifier.    */
        struct {
          uint32_t            _R1:18;
          uint32_t            SID:11;     /**< @brief Standard identifier.    */
          uint32_t            RTR:1;      /**< @brief Remote transmit request.*/
          uint32_t            XTD:1;      /**< @brief Extended identifier.    */
          uint32_t            ESI:1;      /**< @brief Error state indicator.  */
        };
      };
      uint16_t                RXTS:16;    /**< @brief TX time stamp.          */
      uint8_t                 DLC:4;      /**< @brief Data length code.       */
      uint8_t                 BRS:1;      /**< @brief Bit rate switch.        */
      uint8_t                 FDF:1;      /**< @brief FDCAN frame format.     */
      uint8_t                 _R2:2;
      uint8_t                 FIDX:7;     /**< @brief Filter index.           */
      uint8_t                 ANMF:1;     /**< @brief Accepted non-matching
                                                      frame.                  */
    };
  uint32_t                  header32[2];
  };
  /**
   * @brief   Frame data.
   */
  union {
    uint8_t                 data8[CAN_MAX_DLC_BYTES];
    uint16_t                data16[CAN_MAX_DLC_BYTES / 2];
    uint32_t                data32[CAN_MAX_DLC_BYTES / 4];
  };
} CANRxFrame;


3) Sorry, I copied from another project

Code: Select all

static bool fdcan_clock_stop(CANDriver *canp) {
  systime_t start, end;

  /* Requesting clock stop then waiting for it to happen.*/
  canp->fdcan->CCCR &= ~FDCAN_CCCR_CSR;
  start = osalOsGetSystemTimeX();
  end = osalTimeAddX(start, TIME_MS2I(1000));
  while ((canp->fdcan->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA) {
    if (!osalTimeIsInRangeX(osalOsGetSystemTimeX(), start, end)) {
      return true;
    }
    osalThreadSleepS(1);
  }

  return false;
}

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Re: [DEV] STM32G4xx support

Postby alexblack » Thu Mar 26, 2020 9:21 am

Hi.
Is there I2S support for STM32G47xx and what about SAI module?

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Re: [DEV] STM32G4xx support

Postby Giovanni » Thu Mar 26, 2020 12:17 pm

I never user SAI modules before, those would require an I2S driver implementation.

Giovanni


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