Hi,
Attached are three patches which implement a version of the GPT driver for the Kinetis K20.
This driver is based on the PIT (Periodic Interval Timer) of the K20 and suffers from a fatal flaw! The polled mode can never work as the flag which signals when the interval has been completed is not set unless interrupts are enabled.
I am posting this GPT driver for the giggles and because the PIT register definitions and fields are useful.
Watch this space for a driver based on the FTM (Flexible Timer Module) devices.
Share and Enjoy,
Derek
GPT driver for KINETIS K20
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GPT driver for KINETIS K20
- Attachments
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- 0001-KINETIS-PIT-registers-and-fields.patch.gz
- (1023 Bytes) Downloaded 251 times
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- 0002-KINETIS-GPT-implementation-using-PIT.-Note-polled-mo.patch.gz
- (4.12 KiB) Downloaded 270 times
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- 0003-KINETIS-GPT-demo-on-MCHCK-K20-board.patch.gz
- (10.45 KiB) Downloaded 257 times
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Re: GPT driver for KINETIS K20
You can do a polled interval just with a running counter, no need of flags. See the RT counter handling in the kernel.
Giovanni
Giovanni
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Re: GPT driver for KINETIS K20
Giovanni,
Right, so I could use the PIT to handle the interrupts and just watch the current timer value count down in the polled mode.
I will give that a try.
Thanks,
Derek
Right, so I could use the PIT to handle the interrupts and just watch the current timer value count down in the polled mode.
I will give that a try.
Thanks,
Derek
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- Posts: 49
- Joined: Mon Aug 11, 2014 6:40 am
Re: GPT driver for KINETIS K20
Never say never!
The attached patches implement a GPT driver based on the Kinetis PIT (Periodic Interrupt Timer) device. The driver supports all the modes, including the polled mode. A demo for the MCHCK-K20 board is included.
Previously, the counter was not running in debug mode, thus confusing testing. By enabling clocks when in debug mode the issues vanish.
I have tidied up the code a bit and used a pointer to the channels themselves to simplify access.
The underlying PIT device is a 32 bit counter which counts in SYSCLK units.
Cheers,
Derek
The attached patches implement a GPT driver based on the Kinetis PIT (Periodic Interrupt Timer) device. The driver supports all the modes, including the polled mode. A demo for the MCHCK-K20 board is included.
Previously, the counter was not running in debug mode, thus confusing testing. By enabling clocks when in debug mode the issues vanish.
I have tidied up the code a bit and used a pointer to the channels themselves to simplify access.
The underlying PIT device is a 32 bit counter which counts in SYSCLK units.
Cheers,
Derek
- Attachments
-
- 0001-KINETIS-PIT-device-registers-and-fields.patch.gz
- (1.02 KiB) Downloaded 263 times
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- 0002-KINETIS-GPT-driver-based-on-PIT-device.patch.gz
- (4.02 KiB) Downloaded 257 times
-
- 0003-KINETIS-GPT-demo-for-MCHCK-K20-board.patch.gz
- (10.17 KiB) Downloaded 265 times
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- Posts: 49
- Joined: Mon Aug 11, 2014 6:40 am
Re: GPT driver for KINETIS K20
The PIT timer on the KL25Z is very similar and it should be possible to move the driver to the LLD directory.
The KL25Z PIT has 2 channels and the K20 has 4.
The KL25Z also has a 64 bit mode which chains the timers together for what they call a lifetime mode.
2^64 cycles @ 100Mhz is around 6000 years!
The KL25Z PIT has 2 channels and the K20 has 4.
The KL25Z also has a 64 bit mode which chains the timers together for what they call a lifetime mode.
2^64 cycles @ 100Mhz is around 6000 years!
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Re: GPT driver for KINETIS K20
2^64 cycles @ 100Mhz is around 6000 years!
Not sure if that's enough. Might need to run at a lower clock or use a prescaler!
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