MMC (eMMC) support

[barthess]

Verified in hardware. Works as expected.

[jayalfredprufrock]

I pulled the latest chibios trunk yesterday and noticed today that SDIO is no longer working for me. I've tried on a couple of different boards (all based on STM32F411RE) and they all seem to exhibit the same behavior. I'm getting a cmd timeout on "sdc_lld_send_cmd_short_crc" that sets the block size fixed at 512 bytes.

I've double checked pins and DMA channels, tried multiple SD cards, and am passing { NULL, SDC_MODE_4BIT} to sdcConnect. I also tried SDC_MODE_1BIT but I always get the same error. It detects my clock as SDC_CLK_50MHz if that helps to know.

Any suggestions on what could be going on? Thanks,

Andrew

[jayalfredprufrock]

I discovered that if I comment out the following code things start to work again so it looks like a bug was possibly introduced into the detect_bus_clk or sdc_lld_set_data_clk functions since both needed to be commented out.

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if (HAL_SUCCESS != detect_bus_clk(sdcp, &clk))
    goto failed;

sdc_lld_set_data_clk(sdcp, clk);


[barthess]

Will it help if you comment out

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if (HAL_SUCCESS != detect_bus_clk(sdcp, &clk))
    goto failed;

and change

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sdc_lld_set_data_clk(sdcp, clk);

to

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sdc_lld_set_data_clk(sdcp, SDC_CLK_25MHz);

[jayalfredprufrock]

Forcing the setting of the clock to SDC_CLK_25MHz works, so it would seem that the clock detection function is incorrectly choosing 50MHz. FYI I'm using both 32kHz and 12MHz external oscillators.

[barthess]

I see following possible reasons:

1) My code incorrectly detects clock. Please set breakpoint in detection function at line 318

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if ((sdc_cmd6_extract_info(SD_SWITCH_FUNCTION_SPEED, tmp) & 2) == 2)

and post here content of

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uint8_t tmp[N]

array.

2) My code breaks card logic in some way during clock detection.
Comment out clock detection call:

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if (HAL_SUCCESS != detect_bus_clk(sdcp, &clk))
    goto failed;

and enforce SDC_CLK_50MHz. Will it work correctly?
What the card you use (manufacturer, volume, card speed class, etc.)?
Is bug reproducible with other cards?

3) Overclock. It is hard to do in chibios but... could you check clock frequency with oscilloscope to be absolutely sure?
Post here your mcuconf.h and board.h.

[jayalfredprufrock]

Thanks barthess, I'll follow up later today with the answers to your questions.

[barthess]

@ jayalfredprufrock
Thanks for "great help" in this bug hunting.

I committed patch against this trouble. Looks like only
high capacity cards correctly handle that clock detection procedure.
My two 2GB cards report 50MHz support and successfully
mount using f_mount(&SDC_FS, "/", 1) but failed on
the first write attempt. I thought successful mount is enough
and decided that code is correct but it was not.

If somebody will observe troubles with high capacity cards
please write bug report.

[jayalfredprufrock]

@barthess - Forgive me for not following up, but I am not a full-time embedded programmer and sometimes have to prioritize my professional commitments over community support. I did have some time this morning so I applied your recent patch and while this is probably too little too late, I have the answers to your questions.

1. Output of tmp. Had same results before applying your patch.

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tmp[0]   0   
tmp[1]   50   
tmp[2]   128   
tmp[3]   1   
tmp[4]   128   
tmp[5]   1   
tmp[6]   128   
tmp[7]   1   
tmp[8]   128   
tmp[9]   1   
tmp[10]   128   
tmp[11]   1   
tmp[12]   128   
tmp[13]   3   
tmp[14]   0   
tmp[15]   0   
tmp[16]   1
tmp[17-63] = 0   


2. Specifying SDC_CLK_50Mhz explicitly fails as expected. I've tried a sandisk 2gb class 4 miscrosd card and several class 6 unbranded 4gb microsd cards. All were formatted as fat32 with a single partition and default cluster sizes.

3. Here are the relevant definitions from my board.h and mcuconf.h.

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/*
 * Board oscillators-related settings.
 */
#if !defined(STM32_LSECLK)
#define STM32_LSECLK                32768
#endif

#if !defined(STM32_HSECLK)
#define STM32_HSECLK                8000000
#endif

/*
 * HAL driver system settings.
 */
#define STM32_NO_INIT                       FALSE
#define STM32_HSI_ENABLED                   FALSE
#define STM32_LSI_ENABLED                   FALSE
#define STM32_HSE_ENABLED                   TRUE
#define STM32_LSE_ENABLED                   TRUE
#define STM32_CLOCK48_REQUIRED              TRUE
#define STM32_SW                            STM32_SW_PLL
#define STM32_PLLSRC                        STM32_PLLSRC_HSE
#define STM32_PLLM_VALUE                    8
#define STM32_PLLN_VALUE                    336     
#define STM32_PLLP_VALUE                    4       
#define STM32_PLLQ_VALUE                    7       
#define STM32_HPRE                          STM32_HPRE_DIV1 
#define STM32_PPRE1                         STM32_PPRE1_DIV2 
#define STM32_PPRE2                         STM32_PPRE2_DIV1
#define STM32_RTCSEL                        STM32_RTCSEL_LSE
#define STM32_RTCPRE_VALUE                  8
#define STM32_MCO1SEL                       STM32_MCO1SEL_HSE
#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1
#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK
#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5
#define STM32_I2SSRC                        STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE                 192
#define STM32_PLLI2SR_VALUE                 5
#define STM32_PVD_ENABLE                    FALSE
#define STM32_PLS                           STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE                 FALSE

/*
 * SDC driver system settings.
 */
#define STM32_SDC_SDIO_DMA_PRIORITY         3
#define STM32_SDC_SDIO_IRQ_PRIORITY         9
#define STM32_SDC_WRITE_TIMEOUT_MS          250
#define STM32_SDC_READ_TIMEOUT_MS           25
#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE
#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)



Unfortunately I don't have easy access to an oscilloscope which was one of the reasons why I was holding off getting back to you. I'll be in a lab with one next week so I can hopefully verify my clock settings. I really do appreciate all your hard work. I hope that I can one day contribute back to the community as much as you and Giovanni have.

[barthess]

Late is better than never.
1) Did my patch fix problems with all your available cards?
2) Previously you said about 12MHz crystal but your config contains following code

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#define STM32_HSECLK                8000000

This is overclock reason.