stm32f103 write/erase internal Flash

Discussions and support about ChibiOS/RT, the free embedded RTOS.
Alexte
Posts: 23
Joined: Sun Jul 01, 2012 1:24 pm

stm32f103 write/erase internal Flash

Postby Alexte » Fri Aug 25, 2017 7:48 pm

With this configuration, writing or erase to the internal flash causes an error.

Code: Select all

#define STM32_HSI_ENABLED                   FALSE
#define STM32_LSI_ENABLED                   FALSE
#define STM32_HSE_ENABLED                   TRUE
#define STM32_LSE_ENABLED                   FALSE

If I resolve the internal and external clock, then everything works.

Code: Select all

#define STM32_HSI_ENABLED                   TRUE
#define STM32_LSI_ENABLED                   FALSE
#define STM32_HSE_ENABLED                   TRUE
#define STM32_LSE_ENABLED                   FALSE

Question. From which clock does the microprocessor work in this latter case?
External or internal?

User avatar
Giovanni
Site Admin
Posts: 10213
Joined: Wed May 27, 2009 8:48 am
Location: Salerno, Italy
Has thanked: 212 times
Been thanked: 197 times
Contact:

Re: stm32f103 write/erase internal Flash

Postby Giovanni » Fri Aug 25, 2017 8:40 pm

There are other settings for that, you should show the whole clock section of mcuconf.h for me to tell, it depends on the settings of the various muxes and PLL.

Demos are all fed from HSE and PLL.

Giovanni

Alexte
Posts: 23
Joined: Sun Jul 01, 2012 1:24 pm

Re: stm32f103 write/erase internal Flash

Postby Alexte » Sat Aug 26, 2017 11:55 am

Code: Select all

/*
 * HAL driver system settings.
 */
#define STM32_NO_INIT                       FALSE
#define STM32_HSI_ENABLED                   TRUE  // default FALSE
#define STM32_LSI_ENABLED                   FALSE
#define STM32_HSE_ENABLED                   TRUE
#define STM32_LSE_ENABLED                   FALSE
#define STM32_SW                            STM32_SW_PLL  // system clock mux
#define STM32_PLLSRC                        STM32_PLLSRC_HSE // pll mux
#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE                  9
#define STM32_HPRE                          STM32_HPRE_DIV1  // AHB prescaler
#define STM32_PPRE1                         STM32_PPRE1_DIV2  //APB1
#define STM32_PPRE2                         STM32_PPRE2_DIV2  //APB2
#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
#define STM32_USB_CLOCK_REQUIRED            TRUE
#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
#define STM32_PVD_ENABLE                    FALSE
#define STM32_PLS                           STM32_PLS_LEV0


Return to “ChibiOS/RT”

Who is online

Users browsing this forum: No registered users and 1 guest