Need a little help with STM32F7+IAR+ChibiOS Topic is solved

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Need a little help with STM32F7+IAR+ChibiOS

Postby cipher » Thu Jun 02, 2016 8:43 pm

Hi Everyone
First, let me start by saying that i have been playing with Chibios/RT, the latest version (Kernel 3.1.3) and HAL and got it successfully running on our custom board based on STM32F7 chip under IAR compiler.
Im very impressed with performance as well as the features offered by both the OS and the HAL. We are already using MAC, I2C, SPI and drivers work great, in addition to that, i have pulled the latest FLASH driver from the GIT repo and created the spa flash driver for Windond W25Q16 spa flash that we are using , by modifying the micron driver and was pleasantly surprised by how easy it was to understand the code and make the required changes!
Great work guy, please keep it up!

The question that i have will be probably very trivial for you, since I'm very new to Chibi and don't know much internal details.
Basically, what i noticed is that if i enable

Code: Select all

/**
 * @brief   Debug option, system state check.
 * @details If enabled the correct call protocol for system APIs is checked
 *          at runtime.
 *
 * @note    The default is @p FALSE.
 */
#define CH_DBG_SYSTEM_STATE_CHECK           TRUE


then the system hangs in line 153 in chdebug.c

Code: Select all

/**
 * @brief   Guard code for @p chSysLock().
 *
 * @notapi
 */
void _dbg_check_lock(void) {

  if ((ch.dbg.isr_cnt != (cnt_t)0) || (ch.dbg.lock_cnt != (cnt_t)0)) {
    chSysHalt("SV#4");
  }
  _dbg_enter_lock();
}


Callstack shows that the problematic call starts in chHeapAlloc (line 157 in cheap.c) which a call to

Code: Select all

void *chHeapAlloc(memory_heap_t *heapp, size_t size) {
  union heap_header *qp, *hp, *fp;

  if (heapp == NULL) {
    heapp = &default_heap;
  }

  size = MEM_ALIGN_NEXT(size);
  qp = &heapp->h_free;

  H_LOCK(heapp);



The problem appears that the ch.dbg.lock_cnt = 1

However, if i disable the CH_DBG_SYSTEM_STATE_CHECK, the board starts and runs perfect!

Can you please let me know what am i missing?

Also, i attach the performance report built under IAR 7.60.1 running on the STM32F7-DISCO board WITH FPU, just if anyone is interested to compare it to the GCC one available in the source tree.

Optimization was set to High, Speed, no size constrains, all debug options were turned off.

Code: Select all

*** ChibiOS/RT test suite
***
*** Kernel:       3.1.3
*** Compiled:     Jun  1 2016 - 20:00:47
*** Compiler:     IAR
*** Architecture: ARMv7E-M
*** Core Variant: Cortex-M7F
*** Port Info:    Advanced kernel mode
*** Platform:     STM32F746 Very High Performance with DSP and FPU
*** Test Board:   STMicroelectronics STM32F746G-Discovery

----------------------------------------------------------------------------
--- Test Case 1.1 (System, critical zones)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.2 (System, interrupts handling)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.3 (System, integrity)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.1 (Threads, enqueuing test #1)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.2 (Threads, enqueuing test #2)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.3 (Threads, priority change)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.4 (Threads, delays)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.1 (Semaphores, enqueuing)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.2 (Semaphores, timeout)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.3 (Semaphores, atomic signal-wait)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.4 (Binary Semaphores, functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.1 (Mutexes, priority enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.2 (Mutexes, priority return)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.3 (Mutexes, status)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.4 (CondVar, signal test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.5 (CondVar, broadcast test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.6 (CondVar, boost test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.1 (Messages, loop)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.1 (Mailboxes, queuing and timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.1 (Events, registration and dispatch)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.2 (Events, wait and broadcast)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.3 (Events, timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.1 (Heap, allocation and fragmentation test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.1 (Memory Pools, queue/dequeue)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.1 (Dynamic APIs, threads creation from heap)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.2 (Dynamic APIs, threads creation from memory pool)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.3 (Dynamic APIs, registry and references)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Queues, input queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Queues, output queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.1 (Benchmark, messages #1)
--- Score : 972964 msgs/S, 1945928 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.2 (Benchmark, messages #2)
--- Score : 824419 msgs/S, 1648838 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.3 (Benchmark, messages #3)
--- Score : 824419 msgs/S, 1648838 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.4 (Benchmark, context switch)
--- Score : 3692280 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.5 (Benchmark, threads, full cycle)
--- Score : 654539 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.6 (Benchmark, threads, create only)
--- Score : 1004642 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 295484 reschedules/S, 1772904 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.8 (Benchmark, round robin context switching)
--- Score : 1894720 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.9 (Benchmark, I/O Queues throughput)
--- Score : 2399988 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.10 (Benchmark, virtual timers set/reset)
--- Score : 1911862 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.11 (Benchmark, semaphores wait/signal)
--- Score : 3085700 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.12 (Benchmark, mutexes lock/unlock)
--- Score : 2642192 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.13 (Benchmark, RAM footprint)
--- System: 472 bytes
--- Thread: 68 bytes
--- Timer : 20 bytes
--- Semaph: 12 bytes
--- EventS: 4 bytes
--- EventL: 20 bytes
--- Mutex : 16 bytes
--- CondV.: 8 bytes
--- Queue : 36 bytes
--- MailB.: 40 bytes
--- Result: SUCCESS
----------------------------------------------------------------------------

Final result: SUCCESS




Im also planning to submit the Winbond driver back to the community after i test it and clean up the code, as well as my version of the IAR linker file if anyone is interested.

Thanks everyone

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RoccoMarco
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Re: Need a little help with STM32F7+IAR+ChibiOS

Postby RoccoMarco » Thu Jun 02, 2016 9:23 pm

Hi,
there isn't a short answer. You have enabled the state checker:
I suggest you to read this article to understand what state checker does.

Most likely the problem is you are calling a function from the wrong context.

It would be helpful have a call stack of the chSysHalt.

Ciao,
RM

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Re: Need a little help with STM32F7+IAR+ChibiOS

Postby cipher » Thu Jun 02, 2016 10:01 pm

Hi Rocco
Thank you for pointing this out,
I attach the call stack
CallStack.JPG

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Re: Need a little help with STM32F7+IAR+ChibiOS

Postby RoccoMarco » Thu Jun 02, 2016 10:07 pm

Can I take a look to your main also?

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Giovanni
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Re: Need a little help with STM32F7+IAR+ChibiOS

Postby Giovanni » Thu Jun 02, 2016 10:32 pm

Is that a new version of lwIP? the problem seems to be chHeapAlloc() called from within a critical zone.

Giovanni

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Re: Need a little help with STM32F7+IAR+ChibiOS

Postby cipher » Thu Jun 02, 2016 11:03 pm

Hi Rocco and Giovanni
Im using the same LWIP version that comes with the latest stable Chibios, so 1.4.1
Didn't touch any system stuff anywhere, for obvious reasons.

Here is my main, sorry its messy, just using it to test everything

Thanks a lot for the help guys, i really appreciate it!

Code: Select all

/*
    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio

    Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
    You may obtain a copy of the License at

        http://www.apache.org/licenses/LICENSE-2.0

    Unless required by applicable law or agreed to in writing, software
    distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    See the License for the specific language governing permissions and
    limitations under the License.
*/

#include <stdio.h>
#include <string.h>

#include "ch.h"
#include "hal.h"
#include "test.h"

#include "chprintf.h"
#include "shell.h"

#include "lwipthread.h"
#include "web.h"

#include "usbcfg.h"

#include "iperf.h"
#include "led.h"
#include "hal_flash.h"
#include "w25q16_spi.h"
#include "lwip/mem.h"

#include "pro\uhttp\mediatypes.h"
#include "pro\uhttp\modules\mod_redir.h"

#include "sec_api.h"

/*===========================================================================*/
/* Card insertion monitor.                                                   */
/*===========================================================================*/

#define POLLING_INTERVAL                10
#define POLLING_DELAY                   10
#define TEST_WA_SIZE    THD_WORKING_AREA_SIZE(256)

/** the heap. we need one struct mem at the end and some room for alignment */
uint8_t lwip_heap[LWIP_MEM_ALIGN_SIZE(MEM_SIZE) + (2*(2*sizeof(mem_size_t) + sizeof(uint8_t))) + MEM_ALIGNMENT] @ ".SRAM1";


/* I2C interface #2 */
static const SPIConfig spi4cfg = {
    NULL,
    GPIOE,
    GPIOE_SPI4_NSS,
    SPI_CR1_BR_0, // | SPI_CR1_CPHA, // | SPI_CR1_CPOL,
    SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
};


static W25Q16Config w25SpiConfig =
{
  &SPID4,
  &spi4cfg
};

static W25Q16Driver w25SpiDriver;



/*************************************************************************/
/*  HttpTask                                                             */
/*                                                                       */
/*  In    : task parameter                                               */
/*  Out   : none                                                         */
/*  Return: never                                                        */
/*************************************************************************/
static THD_WORKING_AREA(task_http_stack, 1000);
static THD_FUNCTION (HttpTask,p)
{
   (void)p;
/*
   while(!IPIsNetIfUp())
   {
      TimeDly(MS_2_TICKS(500));
   }
*/
   /*
    * Initialize the TCP socket interface.
    */
   StreamInit();

   /*
    * Register media type defaults. These are configurable
    * in include/cfg/http.h or the Nut/OS Configurator.
    */
   MediaTypeInitDefaults();
   HttpRegisterRedir("", "/index.html", 301); 

   /*
    * Wait for a client (browser) and handle its request.
    * This function will only return on unrecoverable errors.
    */
   StreamClientAccept(HttpdClientHandler, NULL);
   
   /* Typically this point will be never reached. */
   while(1)
   {
      chThdSleepMilliseconds(500);
   }
   
   //return(0);       
} /* HttpTask */


#define SPI_BUF_SZ 128
static uint8_t txbuf[SPI_BUF_SZ]@ ".NO_CACHE";
static uint8_t rxbuf[SPI_BUF_SZ]@ ".NO_CACHE";

/*
 * Application entry point.
 */
int main(void) {
 
  uint8_t i = 0;
  uint32_t addr = 0;
 
  SEC_ApiInit();
 
  /*
   * System initializations.
   * - HAL initialization, this also initializes the configured device drivers
   *   and performs the board-specific initializations.
   * - Kernel initialization, the main() function becomes a thread and the
   *   RTOS is active.
   * - lwIP subsystem initialization using the default configuration.
   */
  halInit();
  chSysInit();
  lwipInit(NULL);

  /*
   * Creates the HTTP thread (it changes priority internally).
   */
  //chThdCreateStatic(wa_http_server, sizeof(wa_http_server), NORMALPRIO + 1,
  //                  http_server, NULL);
 
  chThdCreateStatic(task_http_stack, sizeof(task_http_stack), NORMALPRIO + 1, HttpTask, NULL);

  StartLedTask();
  iperf_Start();
 
  /*
  thread_t *tp;

  tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriorityX(),
                           TestThread, &STDOUT_SD);
  */
 
  W25Q16ObjectInit(&w25SpiDriver);
  W25Q16Start(&w25SpiDriver, &w25SpiConfig);
  //W25Q16ReadId(&w25SpiDriver,rxbuf,2);
  flashStartEraseAll(&w25SpiDriver);
 
  while(flashQueryErase(&w25SpiDriver,&addr) == FLASH_BUSY_ERASING)
  {
    chThdSleepMilliseconds(addr);
  }
 
  addr = 0;
 
  /*
   * Normal main() thread activity, in this demo it does nothing except
   * sleeping in a loop and listen for events.
   */

  while (true)
  {
    chThdSleepMilliseconds(1);
    for(int j=0;j<SPI_BUF_SZ;j++)
    {
      txbuf[j] = i;
    }
   
    W25Q16ReadId(&w25SpiDriver,rxbuf,2);
   
#if 0
    //flashStartEraseSector(&w25SpiDriver,0);
    flashRead(&w25SpiDriver, addr, rxbuf, SPI_BUF_SZ);
    flashProgram(&w25SpiDriver, addr, txbuf, SPI_BUF_SZ);
    memset(rxbuf,0,SPI_BUF_SZ);
    flashRead(&w25SpiDriver, addr, rxbuf, SPI_BUF_SZ);
   
    for(int j=0;j<SPI_BUF_SZ;j++)
    {
      if(txbuf[j] != rxbuf[j])
      {
        while(1);
      }
    }
   
    if(addr < 0x1FFF00)
      addr+=SPI_BUF_SZ;
    else
      addr = 0;
    i++;
#endif
   
  }
}


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Re: Need a little help with STM32F7+IAR+ChibiOS

Postby cipher » Fri Jun 03, 2016 8:21 pm

Still trying to figure this out
Any ideas what might cause this check to fail?

The only changes I have is that I put LwIP heap in RAM1 region
All the lwip startup code is the same as in demos

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Re: Need a little help with STM32F7+IAR+ChibiOS

Postby Giovanni » Fri Jun 03, 2016 9:14 pm

Could you try one of the Ethernet demos and see if it happens there too?

Giovanni

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Re: Need a little help with STM32F7+IAR+ChibiOS

Postby steved » Sat Jun 04, 2016 8:16 am

I can remember having to increase the stack a little when I played with LWIP. Don't have the code to hand, but think I posted it at the time.

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Re: Need a little help with STM32F7+IAR+ChibiOS

Postby Giovanni » Sat Jun 04, 2016 3:49 pm

Hi,

I examined the code and found nothing wrong.

The only problem that could cause this IMHO is the IAR project setup. Make sure that the C compiler and the assembler are passed the same set of paths and the same macro definitions (there are two separate tabs in the IAR project settings).
The file chcoreasm_v7m.s does some preprocessor checks and if it is given something different from the C compilers then the C files and the S files are compiled under different configurations.

Giovanni


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