Soft reset

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Tectu
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Soft reset

Postby Tectu » Thu May 31, 2012 7:56 am

Hello Folks,

Is it possible to make a software reset "over ChibiOS"? I couldn't find anything related to that in the docs.

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Re: Soft reset

Postby Giovanni » Thu May 31, 2012 8:48 am

Hi,

I am not sure to understand what you need to achieve, could you add some details?

Giovanni

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Tectu
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Re: Soft reset

Postby Tectu » Thu May 31, 2012 9:02 am

Sure!

You can reset any MCU from different sources. On the STM32 we have for example a hardreset when we pull the NRST pin to low. Another reset source is a software reset. This means that you can write a piece of code, which archives the same as when you would turn the NRST pin to low.
From the reference manual:

Code: Select all

A system reset is generated when one of the following events occurs:
1. A low level on the NRST pin (external reset)
2. Window watchdog end of count condition (WWDG reset)
3. Independent watchdog end of count condition (IWDG reset)
4. A software reset (SW reset) (see Software reset)
5. Low-power management reset (see Low-power management reset)


Code: Select all

Software reset
The SYSRESETREQ bit in CortexTM-M3 Application Interrupt and Reset Control Register
must be set to force a software reset on the device. Refer to the STM32F10xxx Cortex-M3
programming manual (see Related documents on page 1) for more details.


Now I want to know, how to do a proper software reset within ChibiOS.

Hopefully I expressed myself clearer this time.

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Re: Soft reset

Postby Giovanni » Thu May 31, 2012 9:28 am

Hi,

It depends :-)

There is procedure to shutdown entirely the OS, it is described in this article: http://www.chibios.org/dokuwiki/doku.ph ... os:stop_os

If you have threads performing critical operations like writes in EEPROM or Flash then you may want to safely stop the threads then perform the reset.

Giovanni

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Re: Soft reset

Postby russian » Fri Feb 21, 2014 11:17 pm

It's an old thread, but that's where google got me :)

The provided link explains how to make a nice software shutdown and OS re-start. While this is the cleanest way to do any kind of 'reset', it is also an expensive one in terms of development. A separate question would be how to reset the chip the ugly way - to the same effect as the 'reset' button on some boards would reset it. It looks like for example the stm32 library method for that would be NVIC_SystemReset.

So question is ChibiOS has or plans to have a 'dirty' reset function :)

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Re: Soft reset

Postby Giovanni » Sat Feb 22, 2014 8:54 am

ChibiOS relies on CMSIS so it is OK to use that NVIC function.

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Re: Soft reset

Postby MarkusS » Wed Mar 05, 2014 1:38 am

NVIC_SystemReset works like a charm on STM32. You could also go 'bare-metal' and do a:

Code: Select all

SCB_AIRCR = (AIRCR_VECTKEY | (SCB_AIRCR & (0x700)) | (1 << 2)); // reset

which worked for me on STM32F103xx and STM32F4xx...

But I have another question regarding the ChibiOS shutdown/reset:
I am trying to jump into the STM32F4 bootloader from a thread in ChibiOS (I want to enter the boot loader when the 'flash' command is given on the ChibiOS shell). I tried to follow this tutorial http://www.youtube.com/watch?v=cvKC-4tCRgw and the guide on how to shutdown ChibiOS correctly (http://chibios.org/dokuwiki/doku.php?id ... os:stop_os).
Since I could not find the functions stop_system_timer() and stop_any_other_interrupt(), I came up with the following code:

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void RCC_DeInit(void) // src: STM32F4 DSP and standard peripherals library
{
  /* Set HSION bit */
  RCC->CR |= (uint32_t)0x00000001;

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;

  /* Reset HSEON, CSSON, PLLON, PLLI2S and PLLSAI(STM32F42/43xxx devices) bits */
  RCC->CR &= (uint32_t)0xEAF6FFFF;

  /* Reset PLLCFGR register */
  RCC->PLLCFGR = 0x24003010;

  /* Reset PLLI2SCFGR register */
  RCC->PLLI2SCFGR = 0x20003000;

  /* Reset PLLSAICFGR register, only available for STM32F42/43xxx devices */
  RCC->PLLSAICFGR = 0x24003000;

  /* Reset HSEBYP bit */
  RCC->CR &= (uint32_t)0xFFFBFFFF;

  /* Disable all interrupts */
  RCC->CIR = 0x00000000;

  /* Disable Timers clock prescalers selection, only available for STM32F42/43xxx devices */
  RCC->DCKCFGR = 0x00000000;
}

typedef void (*void_func_type)(void);

static void cmd_flash(BaseSequentialStream *chp, int argc, char *argv[]) {
   (void) argv;
   if (argc > 0) {
      chprintf(chp, "Usage: flash\r\n");
      return;
   }
   chprintf(chp, "entering boot loader...\r\n");
   chThdSleepMilliseconds(500);
   chSysDisable();// turn off irqs
   RCC_DeInit();
   SysTick->CTRL = 0;
   SysTick->LOAD = 0;
   SysTick->VAL = 0;
   __set_MSP(0x20001000); // set stack pointer to default address
   ((void_func_type) 0x1FFF0004U)(); // jump to 0x1fff0004 / bootloader start address...
}


but it doesn't work as expected. Any ideas what I might be missing?

Thanks,

Markus

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Re: Soft reset

Postby Giovanni » Wed Mar 05, 2014 9:22 am

Hard to tell, you are missing some de-initialization probably, look at what is done in hal_ll.c, you have to undo that, and undo it in the proper sequence, for example, first you switch the clock to the internal oscillator THEN you stop the PLL.

Do you expect the bootloader to return? after doing all that the OS env is destroyed for sure.

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Re: Soft reset

Postby theShed » Wed Mar 05, 2014 9:31 am

This doesn't look right

((void_func_type) 0x1FFF0004U)(); // jump to 0x1fff0004 / bootloader start address...

0x1ff004 contains the reset vector, not the reset code, it should look a bit more like:

((void_func_type) (*(uint32_t *)0x1FFF0004U)) (); // jump to address @0x1fff0004 / bootloader start address...

--
mike

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Re: Soft reset

Postby MarkusS » Wed Mar 05, 2014 11:26 pm

Mike,

I guess your right (some I got confused, my code would jump to 0x1FFF0004, but you need to jump to the address stored at 0x1FFF0004), but even with the correct jump the boot loader does not start correctly.

I tried several different ways to stop ChibiOS and to re/de-initialize the uC, but no luck. So I went the route recommended here https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Jump+to+internal+bootloader&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=2145 and changed crt0.c so that it jumps to the internal boot loader when a magic flag is set on a reset

If someone is interested in the code, here is what you need to do to set the flag before you issue the reset:

Code: Select all

extern uint32_t __ram_end__;
#define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0))

   chprintf(chp, "entering boot loader...\r\n");
   chThdSleepMilliseconds(200);
   *((unsigned long *)(SYMVAL(__ram_end__) - 4)) = 0xDEADBEEF; // set magic flag => reset handler will jump into boot loader
   NVIC_SystemReset();


and here are the changes to os/ports/GCC/ARMCMx/crt0.c:

Code: Select all

--- ChibiOS-2.6.1/os/ports/GCC/ARMCMx/crt0.c   2013-05-11 07:13:48.000000000 -0500
+++ ChibiOS-2.6.3/os/ports/GCC/ARMCMx/crt0.c   2014-03-05 10:52:30.000000000 -0600
@@ -214,6 +214,12 @@
  */
 extern funcp_t __fini_array_end;
 
+/**
+ * @brief   Ram end.
+ * @pre     The symbol must be aligned to a 32 bits boundary.
+ */
+extern uint32_t __ram_end__;
+
 /** @} */
 
 /**
@@ -271,6 +277,13 @@
   /* Process Stack initialization, it is allocated starting from the
      symbol __process_stack_end__ and its lower limit is the symbol
      __process_stack_base__.*/
+
+  uint32_t *magic_word =  (uint32_t *)(SYMVAL(__ram_end__) - 4); // look at the last word in ram
+  if (*magic_word == 0xDEADBEEF) {
+      *magic_word = 0; // reset magic flag
+      ((funcp_t) (*(uint32_t *)0x1FFF0004U))(); // jump into boot loader
+  }
+
   asm volatile ("cpsid   i");
   psp = SYMVAL(__process_stack_end__);
   asm volatile ("msr     PSP, %0" : : "r" (psp));


This works for me!


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