SDRAM with FMC - STM32

[elagil]

Hello!

I have not found anything official related to the FMC on STM32 (F746 in my case). Is there some driver for it or do I have to extract it from ST HAL libraries or something like that? It seems strange that a feature like this is so rarely used.

Thanks in advance,
Adrian

[Giovanni]

Hi,

There is a contributed driver under /community/os/hal/ports/STM32/LLD/FSMCv1, I don't know the status.

Giovanni

[steved]

I'm not sure that the FMC really lends itself to a generic driver; there are so many modes and detailed configuration choices to make that a driver is mostly going to be a matter of setting up I/O ports, configuration registers and the MMU (easy one to forget, the MMU!). For generic memory the scatter file will also need to be updated.
Having configured FMC to work with a register-based peripheral device, I think the driver was so application-specific that it couldn't reasonably be included within ChibiOS. I haven't investigated FMC as a means of adding memory; maybe that is more amenable to something generic.

[elagil]

Ok, thank you for your tips. I will probably try to get some inspiration from my working CubeMX version of SDRAM access. I also found some other STM32F4 FCM examples.

Adrian

[elagil]

The community driver works great, no problems with my SDRAM.

Please add the STM32F7 series chips in the "#if" brackets, so that the code compiles for processors other than STM32F4.

I changed it to:

Code: Select all

#if (defined(STM32F427xx) || defined(STM32F437xx) || \
     defined(STM32F429xx) || defined(STM32F439xx) || \
     defined(STM32F7))


in all affected files.

If you want to use a similar configuration, find my settings below. Adjust the timings and port widths to your specific sdram. I am using IS42S16160J-7BLI, which is 256Mbit SDRAM and very cheap.

The memory can be easily accessed by using the fixed starting address at 0xC0000000 for my particular bank or 0xD0000000 for the other one.
You can also make changes to the linker file, but I only use sdram as simple storage for data.

Code: Select all

#define SDRAM_DEVICE_ADDR 0xC0000000UL

#include "hal_fsmc_sdram.h"

SDRAMConfig SDRAMCfg;

void init_sdram()
{
  /**
   * Initialize FMC peripheral
   */

  /* SDRAM control register, used for both banks. */
  SDRAMCfg.sdcr = 0 << 13 | // RPIPE
                  1 << 12 | // RBURST
                  2 << 10 | // SDCLK
                  0 << 9  | // WP
                  2 << 7  | // CAS
                  1 << 6  | // NB
                  1 << 4  | // MWID
                  2 << 2  | // NR
                  1 << 0  ; // NC

   /* SDRAM timing register, used for both banks. */
  SDRAMCfg.sdtr = 1 << 24 | // TRCD, 2 cycles
                  1 << 20 | // TRP, 2 cycles
                  3 << 16 | // TWR, 4 cycles
                  7 << 12 | // TRC, 8 cycles
                  3 << 8  | // TRAS, 4 cycles
                  6 << 4  | // TXSR, 7 cycles
                  2 << 0  ; // TMRD, 3 cycles

   /* SDRAM command mode register. Only its MRD and NRFS bits will be used. */
  uint32_t mrd = 2 << 4 | // CAS latency 2
                 2 << 8 ; // Single write burst

  SDRAMCfg.sdcmr = mrd << 9 | // MRD
                   8 << 5 ; // NRFS, number of refresh cycles

   /* SDRAM refresh timer register. Only its COUNT bits will be used. */
  uint32_t refresh_count = (uint32_t)(ceil((double)STM32_SYSCLK/2e6*
                                           (double)15.62-20));
  SDRAMCfg.sdrtr = refresh_count << 1; // COUNT

  fsmcSdramInit();
  fsmcSdramStart(&SDRAMD, &SDRAMCfg);
 }


[dflogeras]

Sorry to railroad, but I am trying to get a minimal SDRAM test running on my STM32F769 Disc1 (the kit without the LCD, if that matters).

I have tried following this example, obviously changing to timings applicably. I found example code in the ST Cube package which of course does not use Chibi, but does have the timings calculated for the SDRAM on this board.

I began with a F7 based minimal project from testhal/. I changed it to use the board from STM32F769I_DISCOVERY. I also defined CHIBIOS_CONTRIB and used the hal.mk and platform.mk from there to get the FMC drivers.

I also had to add (as the original poster said) a few defined(STM32F7)'s in the community headers to enable the FMC driver for my device. I all compiles cleanly, and I can single step through the code and see it get through the initialization without hitting any asserts.

However, when I try to use the memory defined at 0xC0000000, literally nothing happens. I can write to it, but if I read it back, I always get 0. No hardfaults or other catastrophic interrupts fire.

I then pulled the schematic from the ST package, and found that on TP26 (the SD clock) there is nothing. I have configured the clock tree to operate the SYSCLK @ 200Mhz, and divide by 2 for the AHB. Is there something else I need to do to get the clock rolling?

[dflogeras]

I found one source of problem, the STM32F769I-Discovery board.h doesn't set up FMC_SDCLK as ALTERNATE 12, it is set as a normal floating input.

If I correct that, I can see a clock signal on TP26, but it is very small (<1Vpp). If I compile the SDRAM example from Cube, and step to the point that the FMC clock is enabled, I see a nice 3.3Vpp clock signal.

I've tried playing around with OSPEED and PULLUP vs FLOATING on the pin but it only seems to get worse.

[dflogeras]

Whupps, somehow I bungled the value written to SDCLK in the SDCR register (the value from the original poster is correct, I had fat fingered it when editing the other values). Once I set it back, it works correctly. Sorry for the noise.