I've soldered together MCO1 and MC02 and disabled the PLL output on MCO1 and use the PLL to generate a 168 MHz system clock instead so that I can manage to get a 48 MHz clock source for the 48 MHz peripherals and use the USB serial for output and still use the ethernet peripheral.
I then use the MCO2 pin from PLLI2S to try and generate a 50 MHz clock signal but I manage to get it to 48 MHz precision at best...
How come the two internal PLL's differ so much? Since I can't manage to get a 50 MHz clock out of the PLLI2S, can't find that there should be any difference between the two PLL's in the datasheet / reference manual.
8 MHz external crystal
STM32_PLLM_VALUE 8
PLLI2SN_VALUE 200
PLLI2SR_VALUE 2
STM32_MCO2PRE MCO2_PRE_DIV2
Ofc I've tried other combinations to get 50 MHz as well but the frequency isn't affected.
If I instead choose to use the clock 50 MHz clock generated from the main PLL it's fine.
The difference between the two PLL's is quite significant.. :S
Trying to get lwIP to work Topic is solved
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Re: Trying to get lwIP to work Topic is solved
Apparently I was missing
I had it set to STM32_I2SSRC_CKIN before, since the PLLI2S was not getting initialized properly in stm32_clock_init() in hal_lld.c
Now it works with 48 MHz peripheral clock, 168 MHz system clock and 50 MHz clock to Ethernet through PLLI2S to MC02 that is soldered together with MCO1 with a 8 MHz external crystal.
Code: Select all
#define STM32_I2SSRC STM32_I2SSRC_PLLI2S
I had it set to STM32_I2SSRC_CKIN before, since the PLLI2S was not getting initialized properly in stm32_clock_init() in hal_lld.c
Now it works with 48 MHz peripheral clock, 168 MHz system clock and 50 MHz clock to Ethernet through PLLI2S to MC02 that is soldered together with MCO1 with a 8 MHz external crystal.
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