A-D "Linear Buffer" conversion on 32L031

[steved]

I'm trying to use the A-D on a STM32L031 in "Linear Buffer" mode - four samples each on 3 inputs, and haven't managed to get it to work. (I'm actually mostly using 20.3.4, but 21.11.3 didn't work any better).

Basic setup is simple:

Code: Select all


  adcStart(&ADCD1, NULL);
  adcSTM32EnableVREF(&ADCD1);
  adcSTM32EnableTS(&ADCD1);

:
:
static const ADCConversionGroup adcgrpcfg1 =
{
  .circular = FALSE,
  .num_channels = ADC_GRP1_NUM_CHANNELS,
  .end_cb = NULL,
  .error_cb = adcerrorcallback,
//  ADC_CFGR1_ALIGN | ADC_CFGR1_RES_12BIT,      /* CFGRR1 - Left align data, 12-bit */
  .cfgr1 = ADC_CFGR1_RES_12BIT,      /* CFGRR1 - Right align data, 12-bit */
  .cfgr2 = 0,                        /* CFGRR2 */
  .tr = ADC_TR(0, 0),                                     /* TR */
  .smpr = ADC_SMPR_SMP_79P5,                 /* SMPR - Go for slow sampling/conversion */
  .chselr = ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL4 | ADC_CHSELR_CHSEL5              /* CHSELR */
};


    result = adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH);



Works as expected with ADC_GRP1_BUF_DEPTH = 1, but not with ADC_GRP1_BUF_DEPTH = 4

(I also tried with .circular = TRUE; just hangs).

Am I missing something, or is the feature not implemented on ADC1?
(I also looked at ADC5 for a comparison, and couldn't see that it was implemented there either)

[Giovanni]

I think you need to specify ADC_CFGR1_CONT.

Giovanni

[steved]

Yes, that's it, thankyou. (Maybe a little update to the documentation? I couldn't find any detail on this)

Thinking about it, this could probably be handled automatically in adc_lld_start_conversion().

The A-D drivers I looked at all had a piece of code along the lines of:

Code: Select all

 cfgr1 = grpp->cfgr1 | ADC_CFGR1_DMAEN;
  if (grpp->circular) {
    mode  |= STM32_DMA_CR_CIRC;
    cfgr1 |= ADC_CFGR1_DMACFG;
    if (adcp->depth > 1) {
      /* If circular buffer depth > 1, then the half transfer interrupt
         is enabled in order to allow streaming processing.*/
      mode |= STM32_DMA_CR_HTIE;
    }
  }


Just add an 'else' to that:

Code: Select all

 cfgr1 = grpp->cfgr1 | ADC_CFGR1_DMAEN;
  if (grpp->circular) {
    mode  |= STM32_DMA_CR_CIRC;
    cfgr1 |= ADC_CFGR1_DMACFG;
    if (adcp->depth > 1) {
      /* If circular buffer depth > 1, then the half transfer interrupt
         is enabled in order to allow streaming processing.*/
      mode |= STM32_DMA_CR_HTIE;
    }
  }
  else {
    if (adcp->depth > 1) {
      /* If multiple samples per channel, need continuous conversion */
      cfgr1 |= ADC_CFGR1_CONT;
    }
  }


[Giovanni]

Hi,

There are other conditions where "cont" must not be specified, those register settings are meant to be "low level".

Giovanni