STM32F373 DMA struggles

[MarkusS]

Hi,
I am trying to use the SDADC and the DAC (both with 2 channels) with DMA on my custom STM32F373 board using ChibiOS 20.3.2.
In ChibiOS 20.3.2, both SDADC and DAC are configured to use the same DMA channels:

From ChibiOS-20.3.2/os/hal/ports/STM32/STM32F37x/stm32_registry.h

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/* DAC attributes.*/
#define STM32_HAS_DAC1_CH1                  TRUE
#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(2, 3)

#define STM32_HAS_DAC1_CH2                  TRUE
#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(2, 4)

#define STM32_HAS_DAC2_CH1                  TRUE
#define STM32_DAC_DAC2_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(2, 5)


and from ChibiOS-20.3.2/os/hal/ports/STM32/STM32F37x/hal_adc_lld.c in void adc_lld_start(ADCDriver *adcp):

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#if STM32_ADC_USE_SDADC1
    if (&SDADCD1 == adcp) {
      adcp->dmastp = dmaStreamAllocI(STM32_DMA_STREAM_ID(2, 3),
                                     STM32_ADC_SDADC1_DMA_IRQ_PRIORITY,
                                     (stm32_dmaisr_t)adc_lld_serve_dma_interrupt,
                                     (void *)adcp);
      osalDbgAssert(adcp->dmastp != NULL, "unable to allocate stream");

      dmaStreamSetPeripheral(adcp->dmastp, &SDADC1->JDATAR);
      rccEnableSDADC1(true);
      PWR->CR |= PWR_CR_SDADC1EN;
      adcp->sdadc->CR2 = 0;
      adcp->sdadc->CR1 = (adcp->config->cr1 | SDADC_ENFORCED_CR1_FLAGS) &
                         ~SDADC_FORBIDDEN_CR1_FLAGS;
      adcp->sdadc->CR2 = SDADC_CR2_ADON;
    }
#endif /* STM32_ADC_USE_SDADC1 */

#if STM32_ADC_USE_SDADC2
    if (&SDADCD2 == adcp) {
      adcp->dmastp = dmaStreamAllocI(STM32_DMA_STREAM_ID(2, 4),


According to the reference manual, I should be able to change the ADC DMA from (2,3), (2,4) and (2,5) and (1,3), (1,4) and (1,5), but if I change the defines in stm32_registry.h to

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#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 3)
#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 4)
#define STM32_DAC_DAC2_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 5)


the DMA doesn't work anymore (dac_lld_serve_tx_interrupt doesn't get called...). I found the following comment in ChibiOS-20.3.2/os/hal/ports/STM32/LLD/DMAv1/notes.txt

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- For devices without CSELR register it is possible to select channels but
  the SYSCFG CFGR register is not configured, the user has to configure it
  before starting the DMA driver.


but I couldn't figure out what I have to add. Any hints what I can try to get this working?

BTW: Is there an easy way to figure out which version of a peripheral driver a certain chip is using? I mean how can one know if a STM32F4xx is using ADCv3 or ADCv4 or does a STM32F373 use DMAv1 or DMAv2? I think I figured it out for the STM32F373 that I am using, but it was somewhat difficult and I am wondering if there is a easy / recommended way to do this?

[MarkusS]

Never mind... I figured it out after some more reference manual reading.
For anybody trying to do the same, you need to set the SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP, SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP and/or SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP bits in SYSCFG->CFGR1 to remap the DMA channels from (2,3), (2,4) and (2,5) to (1,3), (1,4) and (1,5):

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#if STM32_DAC_DAC1_CH1_DMA_STREAM == STM32_DMA_STREAM_ID(1, 3)
  SYSCFG->CFGR1 |= SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP;
#endif
#if STM32_DAC_DAC1_CH2_DMA_STREAM == STM32_DMA_STREAM_ID(1, 4)
  SYSCFG->CFGR1 |= SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP;
#endif
#if STM32_DAC_DAC2_CH1_DMA_STREAM == STM32_DMA_STREAM_ID(1, 5)
  SYSCFG->CFGR1 |= SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP;
#endif


then you can use DMA1 with DAC and DMA2 is available for SDADC...

I added those to boardInit in board.c. Is there a better place where to put those to make it reusable?

[Giovanni]

Hi,

No problems in putting this in board files but it is not exactly board-related. It could simply be part of your application initialization code.

Giovanni