STM32G071 ADC Start

[Tabulous]

this loop takes for ever ?


/**
* @brief ADC voltage regulator enable.
*
* @param[in] adc pointer to the ADC registers block
*/
NOINLINE static void adc_lld_vreg_on(ADC_TypeDef *adc) {

osalDbgAssert(adc->CR == 0, "invalid register state");

#if defined(ADC_CR_ADVREGEN)
adc->CR = ADC_CR_ADVREGEN;
volatile uint32_t loop = (STM32_HCLK >> 20) << 4;
do {
loop--;
} while (loop > 0);
#else
#endif
}


#define STM32_HSIDIV_VALUE 16//1
#define STM32_HSI16_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
#define STM32_LSI_ENABLED TRUE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_HSISYS//STM32_SW_PLLRCLK
#define STM32_PLLSRC STM32_PLLSRC_NOCLOCK//STM32_PLLSRC_HSI16
#define STM32_PLLM_VALUE 2
#define STM32_PLLN_VALUE 16
#define STM32_PLLP_VALUE 2
#define STM32_PLLQ_VALUE 4
#define STM32_PLLR_VALUE 2
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE STM32_PPRE_DIV1
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK

[Giovanni]

Is this from latest trunk code?

Giovanni

[Tabulous]

Is this from latest trunk code?

Giovanni

#define CH_KERNEL_VERSION "7.1.0"

Downloaded it in July but looking in hal_adc_lld.c this function is still the same

[Giovanni]

That is the RT version

Please make sure to try the latest trunk code, Bob worked on that driver recently.

Giovanni

[Tabulous]

That is the RT version

Please make sure to try the latest trunk code, Bob worked on that driver recently.

Giovanni

So updated to the latest trunk and its still looping...
loop var has 4.2 billion iterations to go

[Tabulous]

changed the code below so i could see what STM32_HCLK value is.

STM32_HCLK with my settings, as above is 1000000.
Thus 1000000 >> 20 would equal zero....... so its plain to see why the loop var is 4.2billion iterations.

This code to to create a delay(datasheet tADCVREG_SETUP 20uS) based on AHB clock frequency is not good.

Code: Select all

NOINLINE static void adc_lld_vreg_on(ADC_TypeDef *adc) {

  osalDbgAssert(adc->CR == 0, "invalid register state");

#if defined(ADC_CR_ADVREGEN)
  adc->CR = ADC_CR_ADVREGEN;
  int temp = STM32_HCLK;

  volatile uint32_t loop = (temp >> 20) << 4;
  do {
    loop--;
  } while (loop > 0);
#else
#endif
}


[FXCoder]

That timing loop doesn't play nicely with 1MHz (0xF4240) STM32_HCLK.
It runs out of bits in the >> 20.

[Tabulous]

That timing loop doesn't play nicely with 1MHz (0xF4240) STM32_HCLK.
It runs out of bits in the >> 20.

just for now ive hard coded it

NOINLINE static void adc_lld_vreg_on(ADC_TypeDef *adc) {

osalDbgAssert(adc->CR == 0, "invalid register state");

#if defined(ADC_CR_ADVREGEN)
adc->CR = ADC_CR_ADVREGEN;
volatile uint32_t loop = 10000;//(STM32_HCLK >> 20) << 4;
do {
loop--;
} while (loop > 0);
#else
#endif
}

[Giovanni]

It needs a different expression, not a big deal.

Giovanni

[FXCoder]

Just OR the >> 20 result with 1 before left shift 4?