Support for use of LPTIMx as system timer in freerunning mode

[iggarpe]

That is not a planned situation, there is not a specific behaviour defined for that, it is to be verified.

In general it is responsibility of the timer driver to behave as expected by upper layers.

Giovanni

This comment in the STM32 ST interrupt (LLD/TIMv1/hal_st_lld.c) suggests that it would be harmless:

Code: Select all

  /* Note, under rare circumstances an interrupt can remain latched even if
     the timer SR register has been cleared, in those cases the interrupt
     is simply ignored.*/
  if ((STM32_ST_TIM->SR & TIM_SR_CC1IF) != 0U) {
    STM32_ST_TIM->SR = 0U;