Hi,
I'm designing a board for an STM32F730Z in an attempt to get USB_HS (480Mbps) working....
Is this going to be a breeze using chibios or are there troubles to be expected?
USB HS on STM32F730Z
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Re: USB HS on STM32F730Z
Hi,
USB is working correctly on all F7xx boards we tried it (nucleo and discovery), never tried an F730 but there is no reason it should not work, I would take the USB interface design from some existing supported board.
Giovanni
USB is working correctly on all F7xx boards we tried it (nucleo and discovery), never tried an F730 but there is no reason it should not work, I would take the USB interface design from some existing supported board.
Giovanni
Re: USB HS on STM32F730Z
The thing is that the F730 in the 144+ pins versions has the USB-HS-PHY on the chip. (*) I'm trying to get a my first 480mbps design working. (#)
I did some digging and found a few appnotes from ST about USB design and it seems I was doing things too complicated. On all my designs I had a series-resistor in the data-lines. Turns out the recommendation from ST is: don't. They designed the pads to have the right impedance from the get-go. So... starting now any re-order of the STM boards will remove the resistors.
(*) The fact that only the physically larger versions have this hints to me that they might be adding an ULPI chip inside the package. On the other hand, this is the "value line", so not a chip where you expect a multi-chip-package.
(#) I tried ULPI in the past, but wasn't able to get it working before I got distracted.
I did some digging and found a few appnotes from ST about USB design and it seems I was doing things too complicated. On all my designs I had a series-resistor in the data-lines. Turns out the recommendation from ST is: don't. They designed the pads to have the right impedance from the get-go. So... starting now any re-order of the STM boards will remove the resistors.
(*) The fact that only the physically larger versions have this hints to me that they might be adding an ULPI chip inside the package. On the other hand, this is the "value line", so not a chip where you expect a multi-chip-package.
(#) I tried ULPI in the past, but wasn't able to get it working before I got distracted.
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Re: USB HS on STM32F730Z
Hi,
External ULPI PHYs do work, it has been tested. Hopefully the internal one behaves in the same way.
Giovanni
External ULPI PHYs do work, it has been tested. Hopefully the internal one behaves in the same way.
Giovanni
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Re: USB HS on STM32F730Z
rew wrote:(*) The fact that only the physically larger versions have this hints to me that they might be adding an ULPI chip inside the package. On the other hand, this is the "value line", so not a chip where you expect a multi-chip-package.
The first thing I look at when trying to figure out such questions is to look at the die ids from ST. They are published in .xml files within cubemx. They are in "plugins/com.st.stm32cube.common.mx_<version>/db/mcu". If you do not want to extract them yourself, you can find a somewhat current version here in a German forum: https://www.mikrocontroller.net/topic/459746#6123966.
When you look there, you can see that the STM32F730Z, as all the other sizes of the STM32F730, all share the same die 452. Also the STM32F722, STM32F723, STM32F733 all use the exact same die. So it is highly unlikely that they implement different features on the Z size that isn't also on the other sizes.
Then take a look at the datasheet. You can see that the PB14 and PB15 pins have different features for the sizes with HS PHY and without. But while the pins on the HS PHY sizes are lacking some functions like timer channels or SPI I/O, they are still regular GPIO pins which can be used for GPIO and EXTI. Having a separate ULPI die in the package would make it very unlikely that these could still be used as GPIO.
So my guess is that ST bought the IP of the HS PHY and puts it into all STM32F730s. But they have different bond pads which are either the regular pins with all the timer channels, SPI I/O and the like, or the HS PHY. By bonding one pad or the other to the outside they can decide which features to make available. And in some marketing and product manager meeting they decided to just bring out this feature for the Z and I sizes.
Re: USB HS on STM32F730Z
I agree that the fact that you can still use them as a GPIO is a hint that everything happens on-die. On the other hand, why disable the feature on the smaller packages? Oh, wait! e.g. TIM1_CH4 overlaps with the USB1 pins. If you NEED to use the USB pins, then using TIM1_CH4 requires you to go to a 100+ pin package, at that time this feature also becomes available on PE9. But wouldn't it be better to just fill in a few other AF positions in the matrix to give you a few more options to move things around instead of requiring the much larger package? I would very much like a smaller 480mpbs capable chip for some applications.
Anyway... PCBs ordered: "and now... we wait!" (I already have a batch of the chips....)
Anyway... PCBs ordered: "and now... we wait!" (I already have a batch of the chips....)
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Re: USB HS on STM32F730Z
rew wrote:But wouldn't it be better to just fill in a few other AF positions in the matrix to give you a few more options to move things around instead of requiring the much larger package?
I don't know why they did it like that. I guess there are technical reasons. Maybe the HS PHY IP they licensed allows only limited options regarding manipulating the io structure. And they didn't want to sacrifice all the other alternate functions for these pins on the smaller ICs. On the larger ones you have enough alternatives where you can bring out these or very similar functions.
With the STM32 line you always need a bigger pincount for some features. For example for Ethernet you need the 100+ pin devices, even if RMII doesn't use up that much pins. For the HS PHY it seems to be similar.
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