ADCv3 watchdog threshold regs 2,3 non existent

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faisal
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ADCv3 watchdog threshold regs 2,3 non existent

Postby faisal » Fri Sep 21, 2018 5:57 pm

STM32L496

ADCv3 exposes ADC_TR1 in the ADCConversionGroup struct as tr1. ADC_TR2, and ADC_TR3 are missing.

Patch below.

Code: Select all

Index: os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c
===================================================================
--- os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c  (revision 12270)
+++ os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c  (working copy)
@@ -854,7 +854,9 @@
      is enabled.*/
   adcp->adcm->ISR   = adcp->adcm->ISR;
   adcp->adcm->IER   = ADC_IER_OVR | ADC_IER_AWD1;
-  adcp->adcm->TR1   = grpp->tr1;
+  adcp->adcm->TR1   = grpp->tr[0];
+  adcp->adcm->TR2   = grpp->tr[1];
+  adcp->adcm->TR3   = grpp->tr[2];
 #if STM32_ADC_DUAL_MODE
 
   /* Configuring the CCR register with the user-specified settings
Index: os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h
===================================================================
--- os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h  (revision 12270)
+++ os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h  (working copy)
@@ -730,9 +730,9 @@
   uint32_t                  cfgr2;
 #endif
   /**
-   * @brief   ADC TR1 register initialization data.
+   * @brief   ADC TRx register initialization data.
    */
-  uint32_t                  tr1;
+  uint32_t                  tr[3];
 #if STM32_ADC_DUAL_MODE || defined(__DOXYGEN__)
   /**
    * @brief   ADC CCR register initialization data.

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