STM32_TIMXCLK selection / PWM HAL

ChibiOS public support forum for topics related to the STMicroelectronics STM32 family of micro-controllers.

Moderators: barthess, RoccoMarco

Raul
Posts: 40
Joined: Thu Aug 13, 2015 5:15 pm
Has thanked: 3 times
Been thanked: 1 time

STM32_TIMXCLK selection / PWM HAL

Postby Raul » Mon Jan 22, 2018 6:04 pm

Hi there,

I have a couple of doubts originated from configuring ChbiOS to work on a STM32F401RE, HAL ports for STM32:

1) hal_lld.h

Code: Select all

1926 /**
1927  * @brief   Clock of timers connected to APB1
1928  *          (Timers 2, 3, 4, 5, 6, 7, 12, 13, 14).
1929  */
1930 #if (STM32_PPRE1 == STM32_PPRE1_DIV1) || defined(__DOXYGEN__)
1931 #define STM32_TIMCLK1               (STM32_PCLK1 * 1)
1932 #else
1933 #define STM32_TIMCLK1               (STM32_PCLK1 * 2)
1934 #endif


Why if STM32_PPRE1 is set to STM32_PPRE1_DIV2 then STM32_PCLK1 is * 2?
In the case of running it with the mcu config for the Nucleo64 STM32F401RE, STM32_TIMCLK1 would end up being 84 MHz, APB1 is limited to 42 MHz. Is STM32_TIMCLK1 > STM32PCLK1_MAX ok?

2) hal_pwm_lld.c:

Code: Select all

368 void pwm_lld_start(PWMDriver *pwmp) {
369   uint32_t psc;
370   uint32_t ccer;
371
372   if (pwmp->state == PWM_STOP) {
373     /* Clock activation and timer reset.*/
374 #if STM32_PWM_USE_TIM1
375     if (&PWMD1 == pwmp) {
376       rccEnableTIM1(FALSE);
377       rccResetTIM1();
378 #if !defined(STM32_TIM1_SUPPRESS_ISR)
379       nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_PWM_TIM1_IRQ_PRIORITY);
380       nvicEnableVector(STM32_TIM1_CC_NUMBER, STM32_PWM_TIM1_IRQ_PRIORITY);
381 #endif
382 #if defined(STM32_TIM1CLK)
383       pwmp->clock = STM32_TIM1CLK;
384 #else
385       pwmp->clock = STM32_TIMCLK2;
386 #endif
387     }
388 #endif
389
390 #if STM32_PWM_USE_TIM2
391     if (&PWMD2 == pwmp) {
392       rccEnableTIM2(FALSE);
393       rccResetTIM2();
394 #if !defined(STM32_TIM2_SUPPRESS_ISR)
395       nvicEnableVector(STM32_TIM2_NUMBER, STM32_PWM_TIM2_IRQ_PRIORITY);
396 #endif
397 #if defined(STM32_TIM2CLK)
398       pwmp->clock = STM32_TIM2CLK;
399 #else
400       pwmp->clock = STM32_TIMCLK1;
401 #endif
402     }
403 #endif
404
405 #if STM32_PWM_USE_TIM3
406     if (&PWMD3 == pwmp) {
407       rccEnableTIM3(FALSE);
408       rccResetTIM3();
409 #if !defined(STM32_TIM3_SUPPRESS_ISR)
410       nvicEnableVector(STM32_TIM3_NUMBER, STM32_PWM_TIM3_IRQ_PRIORITY);
411 #endif
412 #if defined(STM32_TIM3CLK)
413       pwmp->clock = STM32_TIM3CLK;
414 #else
415       pwmp->clock = STM32_TIMCLK1;
416 #endif
417     }
418 #endif
419
420 #if STM32_PWM_USE_TIM4
421     if (&PWMD4 == pwmp) {
422       rccEnableTIM4(FALSE);
423       rccResetTIM4();
424 #if !defined(STM32_TIM4_SUPPRESS_ISR)
425       nvicEnableVector(STM32_TIM4_NUMBER, STM32_PWM_TIM4_IRQ_PRIORITY);
426 #endif
427 #if defined(STM32_TIM4CLK)
428       pwmp->clock = STM32_TIM4CLK;
429 #else
430       pwmp->clock = STM32_TIMCLK1;
431 #endif
432     }
433 #endif
434
435 #if STM32_PWM_USE_TIM5
436     if (&PWMD5 == pwmp) {
437       rccEnableTIM5(FALSE);
438       rccResetTIM5();
439 #if !defined(STM32_TIM5_SUPPRESS_ISR)
440       nvicEnableVector(STM32_TIM5_NUMBER, STM32_PWM_TIM5_IRQ_PRIORITY);
441 #endif
442 #if defined(STM32_TIM5CLK)
443       pwmp->clock = STM32_TIM5CLK;
444 #else
445       pwmp->clock = STM32_TIMCLK1;
446 #endif
447     }
448 #endif


Why the all the clocks, except for PWMD1, default to use TIMCLK1? (Clock of timers connected to APB2 (Timers 1, 8, 9, 10, 11))
Why does the PWMD1 defaults to TIMCLK2? (I appreciate that STM32_TIM1CLK would typically exist)

Thanks,

Raul

Return to “STM32 Support”

Who is online

Users browsing this forum: No registered users and 11 guests