I added the TIM clock sources and adjusted RCC macros, it should be OK now.
Giovanni
Where to start STM32H7 support
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Re: Where to start STM32H7 support
Serial driver working (without FIFO yet).
This thing is ridiculously fast:
Giovanni
This thing is ridiculously fast:
Code: Select all
*** ChibiOS/RT Test Suite
***
*** Compiled: Dec 26 2017 - 11:48:56
*** Platform: STM32H743 Very High Performance with DSP and FPU
*** Test Board: STMicroelectronics STM32 Nucleo144-H743ZI
============================================================================
=== Test Sequence 1 (Information)
----------------------------------------------------------------------------
--- Test Case 1.1 (Port Info)
--- Architecture: ARMv7E-M
--- Core Variant: Cortex-M7
--- Compiler: GCC 7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204]
--- Port Info: Advanced kernel mode
--- Natural alignment: 4
--- Stack alignment: 8
--- Working area alignment: 8
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.2 (Kernel Info)
--- Product: ChibiOS/RT
--- Stable Flag: 0
--- Version String: 5.0.0
--- Major Number: 5
--- Minor Number: 0
--- Patch Number: 0
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.3 (Kernel Settings)
--- CH_CFG_ST_RESOLUTION: 32
--- CH_CFG_ST_FREQUENCY: 10000
--- CH_CFG_INTERVALS_SIZE: 32
--- CH_CFG_TIME_TYPES_SIZE: 32
--- CH_CFG_ST_TIMEDELTA: 2
--- CH_CFG_TIME_QUANTUM: 0
--- CH_CFG_MEMCORE_SIZE: 0
--- CH_CFG_NO_IDLE_THREAD: 0
--- CH_CFG_OPTIMIZE_SPEED: 1
--- CH_CFG_USE_TM: 1
--- CH_CFG_USE_REGISTRY: 1
--- CH_CFG_USE_WAITEXIT: 1
--- CH_CFG_USE_SEMAPHORES: 1
--- CH_CFG_USE_SEMAPHORES_PRI: 0
--- CH_CFG_USE_MUTEXES: 1
--- CH_CFG_USE_MUTEXES_RECURS: 0
--- CH_CFG_USE_CONDVARS: 1
--- CH_CFG_USE_CONDVARS_TIMEO: 1
--- CH_CFG_USE_EVENTS: 1
--- CH_CFG_USE_EVENTS_TIMEOUT: 1
--- CH_CFG_USE_MESSAGES: 1
--- CH_CFG_USE_MESSAGES_PRI: 0
--- CH_CFG_USE_MAILBOXES: 1
--- CH_CFG_USE_MEMCORE: 1
--- CH_CFG_USE_HEAP: 1
--- CH_CFG_USE_MEMPOOLS: 1
--- CH_CFG_USE_OBJ_FIFOS: 1
--- CH_CFG_USE_DYNAMIC: 1
--- CH_CFG_USE_FACTORY: 1
--- CH_CFG_FACTORY_MAX_NAMES_LENGTH: 8
--- CH_CFG_FACTORY_OBJECTS_REGISTRY: 1
--- CH_CFG_FACTORY_GENERIC_BUFFERS: 1
--- CH_CFG_FACTORY_SEMAPHORES: 1
--- CH_CFG_FACTORY_MAILBOXES: 1
--- CH_CFG_FACTORY_OBJ_FIFOS: 1
--- CH_DBG_STATISTICS: 0
--- CH_DBG_SYSTEM_STATE_CHECK: 0
--- CH_DBG_ENABLE_CHECKS: 0
--- CH_DBG_ENABLE_ASSERTS: 0
--- CH_DBG_TRACE_MASK: 0
--- CH_DBG_TRACE_BUFFER_SIZE: 128
--- CH_DBG_ENABLE_STACK_CHECK: 0
--- CH_DBG_FILL_THREADS: 0
--- CH_DBG_THREADS_PROFILING: 0
--- Result: SUCCESS
============================================================================
=== Test Sequence 2 (System layer and port interface)
----------------------------------------------------------------------------
--- Test Case 2.1 (System integrity functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.2 (Critical zones functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.3 (Interrupts handling functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.4 (System Tick Counter functionality)
--- Result: SUCCESS
============================================================================
=== Test Sequence 3 (Threads Functionality)
----------------------------------------------------------------------------
--- Test Case 3.1 (Thread Sleep functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.2 (Ready List functionality, threads priority order)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.3 (Priority change test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.4 (Priority change test with Priority Inheritance)
--- Result: SUCCESS
============================================================================
=== Test Sequence 4 (Suspend/Resume)
----------------------------------------------------------------------------
--- Test Case 4.1 (Suspend and Resume functionality)
--- Result: SUCCESS
============================================================================
=== Test Sequence 5 (Counter Semaphores)
----------------------------------------------------------------------------
--- Test Case 5.1 (Semaphore primitives, no state change)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.2 (Semaphore enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.3 (Semaphore timeout test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.4 (Testing chSemAddCounterI() functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.5 (Testing chSemWaitSignal() functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.6 (Testing Binary Semaphores special case)
--- Result: SUCCESS
============================================================================
=== Test Sequence 6 (Mutexes, Condition Variables and Priority Inheritance)
----------------------------------------------------------------------------
--- Test Case 6.1 (Priority enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.2 (Priority return verification)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.3 (Repeated locks, non recursive scenario)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.4 (Condition Variable signal test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.5 (Condition Variable broadcast test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.6 (Condition Variable priority boost test)
--- Result: SUCCESS
============================================================================
=== Test Sequence 7 (Synchronous Messages)
----------------------------------------------------------------------------
--- Test Case 7.1 (Messages Server loop)
--- Result: SUCCESS
============================================================================
=== Test Sequence 8 (Event Sources and Event Flags)
----------------------------------------------------------------------------
--- Test Case 8.1 (Events registration)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.2 (Event Flags dispatching)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.3 (Events Flags wait using chEvtWaitOne())
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.4 (Events Flags wait using chEvtWaitAny())
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.5 (Events Flags wait using chEvtWaitAll())
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.6 (Events Flags wait timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.7 (Broadcasting using chEvtBroadcast())
--- Result: SUCCESS
============================================================================
=== Test Sequence 9 (Dynamic threads)
----------------------------------------------------------------------------
--- Test Case 9.1 (Threads creation from Memory Heap)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.2 (Threads creation from Memory Pool)
--- Result: SUCCESS
============================================================================
=== Test Sequence 10 (Benchmarks)
----------------------------------------------------------------------------
--- Test Case 10.1 (Messages performance #1)
--- Score : 2083326 msgs/S, 4166652 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.2 (Messages performance #2)
--- Score : 1754380 msgs/S, 3508760 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.3 (Messages performance #3)
--- Score : 1754380 msgs/S, 3508760 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.4 (Context Switch performance)
--- Score : 6557360 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.5 (Threads performance, full cycle)
--- Score : 1265818 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.6 (Threads performance, create/exit only)
--- Score : 1587297 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.7 (Mass reschedule performance)
--- Score : 568180 reschedules/S, 3409080 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.8 (Round-Robin voluntary reschedule)
--- Score : 4610940 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.9 (Virtual Timers set/reset performance)
--- Score : 3483432 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.10 (Semaphores wait/signal performance)
--- Score : 7843112 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.11 (Mutexes lock/unlock performance)
--- Score : 5633784 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.12 (RAM Footprint)
--- System: 2176 bytes
--- Thread: 68 bytes
--- Timer : 20 bytes
--- Semaph: 12 bytes
--- Mutex : 16 bytes
--- CondV.: 8 bytes
--- EventS: 4 bytes
--- EventL: 20 bytes
--- MailB.: 40 bytes
--- Result: SUCCESS
----------------------------------------------------------------------------
Final result: SUCCESS
*** ChibiOS OS Library Test Suite
***
*** Compiled: Dec 26 2017 - 11:48:56
*** Platform: STM32H743 Very High Performance with DSP and FPU
*** Test Board: STMicroelectronics STM32 Nucleo144-H743ZI
============================================================================
=== Test Sequence 1 (Mailboxes)
----------------------------------------------------------------------------
--- Test Case 1.1 (Mailbox normal API, non-blocking tests)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.2 (Mailbox I-Class API, non-blocking tests)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.3 (Mailbox timeouts)
--- Result: SUCCESS
============================================================================
=== Test Sequence 2 (Memory Pools)
----------------------------------------------------------------------------
--- Test Case 2.1 (Loading and emptying a memory pool)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.2 (Loading and emptying a guarded memory pool without waiting)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.3 (Guarded Memory Pools timeout)
--- Result: SUCCESS
============================================================================
=== Test Sequence 3 (Memory Heaps)
----------------------------------------------------------------------------
--- Test Case 3.1 (Allocation and fragmentation)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.2 (Default Heap)
--- Result: SUCCESS
============================================================================
=== Test Sequence 4 (Objects Factory)
----------------------------------------------------------------------------
--- Test Case 4.1 (Objects Registry)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.2 (Dynamic Buffers Factory)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.3 (Dynamic Semaphores Factory)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.4 (Dynamic Mailboxes Factory)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.5 (Dynamic Objects FIFOs Factory)
--- Result: SUCCESS
----------------------------------------------------------------------------
Final result: SUCCESS
Giovanni
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Re: Where to start STM32H7 support
Thanks Giovanni,
are u kidding? This thing does context switches with more than 6MHz . According to the bus matrix structure and the existance of the mdma i think about placing the kernel and interrupts in the ITCM. But this could be pointless cause when u have a look at the results from STs Performance Tests in AN4891 http://www.st.com/content/ccc/resource/ ... 306681.pdf
This CPU is only 13% slower when running code from external SDRAM with active caches. So the TCM are best used by control algorithms who need deterministic behaviour.
Are the linker scripts already setup?
are u kidding? This thing does context switches with more than 6MHz . According to the bus matrix structure and the existance of the mdma i think about placing the kernel and interrupts in the ITCM. But this could be pointless cause when u have a look at the results from STs Performance Tests in AN4891 http://www.st.com/content/ccc/resource/ ... 306681.pdf
This CPU is only 13% slower when running code from external SDRAM with active caches. So the TCM are best used by control algorithms who need deterministic behaviour.
Are the linker scripts already setup?
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Re: Where to start STM32H7 support
Yes, already setup, it is all about HAL now, most peripherals are different, I am starting with DMAs, not so easy because there 4 DMAs units of 3 different kinds... on the positive side, then new DMAMUX allows to remove the DMA selection craziness, any peripheral can go on any channel of its DMA block.
Giovanni
Giovanni
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Re: Where to start STM32H7 support
The DMAs need to be fixed before porting DMA dependend drivers i think. U have my respect in designing a new driver for all the DMAs. I will try ur last changes on my board an report back if i'am facing any issues. The normal timers look like an easy porting target.
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Re: Where to start STM32H7 support
Hi Giovanni,
GPT, PWM and ICU are working with IRQs and every thing.
regards
Tec
GPT, PWM and ICU are working with IRQs and every thing.
regards
Tec
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Re: Where to start STM32H7 support
Hi,
Small update.
The new SPIv3 and DMAv3 drivers now work. The SPI demo now shows ho to handle cached buffers correctly using the DMA functions and the new portability macros for alignment.
The ccportab.h inclusion path is now added by the startup .mk files. the file must be included explicitly by the application where needed.
Giovanni
Small update.
The new SPIv3 and DMAv3 drivers now work. The SPI demo now shows ho to handle cached buffers correctly using the DMA functions and the new portability macros for alignment.
The ccportab.h inclusion path is now added by the startup .mk files. the file must be included explicitly by the application where needed.
Giovanni
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Re: Where to start STM32H7 support
Hi,
Current status.
Working drivers:
- HAL
- PAL
- Serial (can be optimized, requires a rewrite for taking advantage of internal FIFO)
- SPI, working but SPI6 not tested
- I2C, ported but not tested because lack of HW, it could be optimized to use one DMA channel instead of two
- DMA and BDMA minidrivers
- RTC, compiles with no changes, to be tested
- WDG, compiles with no changes, to be tested
- GPT, ICU, PWM and ST working with no changes
Missing drivers, ordered by priority:
- ADC, requires a new driver, it is next in my list
- DAC, should be simple
- UART, should be simple
- USB/OTG, requires a new driver because I want to use DMAs, both units have it now
- I2S, requires a new driver
- QSPI, not assessed yet
- SDIO, not assessed yet
- MAC, requires a new driver, it is similar to the old IP but still requires a rewrite
- FDCAN, requires a new driver, not sure if/when doing this
Feel free to take test/implementation tasks
Giovanni
Current status.
Working drivers:
- HAL
- PAL
- Serial (can be optimized, requires a rewrite for taking advantage of internal FIFO)
- SPI, working but SPI6 not tested
- I2C, ported but not tested because lack of HW, it could be optimized to use one DMA channel instead of two
- DMA and BDMA minidrivers
- RTC, compiles with no changes, to be tested
- WDG, compiles with no changes, to be tested
- GPT, ICU, PWM and ST working with no changes
Missing drivers, ordered by priority:
- ADC, requires a new driver, it is next in my list
- DAC, should be simple
- UART, should be simple
- USB/OTG, requires a new driver because I want to use DMAs, both units have it now
- I2S, requires a new driver
- QSPI, not assessed yet
- SDIO, not assessed yet
- MAC, requires a new driver, it is similar to the old IP but still requires a rewrite
- FDCAN, requires a new driver, not sure if/when doing this
Feel free to take test/implementation tasks
Giovanni
Re: Where to start STM32H7 support
Hi to all who put support into this,
that is awesome work you have done there. Very big thumbs up, although I have only small ones, better for programming etc.
Just for confirmation, in the next release all hal_ext_lld_isr.* will be renamed into stm32_isr.*, correct ?
Thanks and kind regards,
Peter.
that is awesome work you have done there. Very big thumbs up, although I have only small ones, better for programming etc.
Just for confirmation, in the next release all hal_ext_lld_isr.* will be renamed into stm32_isr.*, correct ?
Thanks and kind regards,
Peter.
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