STM32F746-DISCO heap problems Topic is solved

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cpu20
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STM32F746-DISCO heap problems

Postby cpu20 » Mon May 22, 2017 12:27 pm

Hello,
I am developing an application an the STM32F746-discovery board with ChibiOS. Now I am having trouble with the heap memory.
When setting the CH_CFG_MEMCORE_SIZE to zero to let ChibiOS manage all the available RAM, the '__heap_base__' is set to 0x2001 0080 and '__heap_end__' is set to 0x2005 0000. The problem is that this is not the free RAM but that is all the RAM (even one address in the reserved space).
Now when using this configuration allocating from memory goes wrong. When creating a dynamic thread, weird things happen. eg. When using SPI the data send from the thread created from the heap is incorrect.

When setting the CH_CFG_MEMCORE_SIZE to 0xCB38 (that is the maximum heap size the compiler let's me allocate). Everything works just fine.
I have no idea why this is happening...

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Giovanni
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Re: STM32F746-DISCO heap problems  Topic is solved

Postby Giovanni » Mon May 22, 2017 1:28 pm

Hi,

The SPI driver uses DMAs, probably it is related to this: http://chibios.org/dokuwiki/doku.php?id ... _dma_guide

Heap is, by default, allocated in cacheable memory, you need to do cache coherency management or create an heap in TCM memory which is not cached.

Giovanni

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Re: STM32F746-DISCO heap problems

Postby cpu20 » Mon May 22, 2017 2:26 pm

That is exactly what was happening! Quickly tested the buffer flushing and invalidation and that works perfectly.
I did not know cache coherency was a problem on the F7 platform. Good to know!

Thanks a lot for the help!

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Re: STM32F746-DISCO heap problems

Postby Giovanni » Mon May 22, 2017 3:44 pm

Good, also remember to allocate buffer to be aligned to cache lines (32 bytes).

It is not an F7 problem anyway, it is how the M7 cache works, all M7 platforms are impacted.

Giovanni


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