External ADC & DMA

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Re: External ADC & DMA

Postby rew » Fri Feb 24, 2017 10:57 am

Adresses are in BYTES. so 0x2000 0000 is a byte, two nibbles. The accounting is probably used as two 32-bit words. one at 0x2000 0000 and the second at 0x2000 0004.

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Re: External ADC & DMA

Postby Skadi » Thu Mar 30, 2017 4:24 pm

Hi,

I redesigned my board and I was able to establish a DMA connection with the external ADC, with a sample rate of 30 MHz. It seems that's the maximum read-in freuquency of the microcontroller operating at 168 MHz.

I'm using a dual channel ADC and I tried to read in both channels simultaneously. But when I enable the two different DMA2 streams (triggered by the same clock signal) both digital signals are completely destroyed. They don't even look like my sinusodial test signals. Do I have to consider some thing special by using two DMA2 streams simultaneously?

BR
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Re: External ADC & DMA

Postby Giovanni » Thu Mar 30, 2017 5:51 pm

Hi,

Not sure, you should consider that "simultaneous" does not exist but the interval is tiny, do you see correct signals on the GPIO pins? using a logic analyzer I mean.

It could be also a memory bandwidth problem, if so try reducing the sampling time and see if it starts working.

Giovanni

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Re: External ADC & DMA

Postby Skadi » Fri Mar 31, 2017 1:24 am

Hi Giovanni,

both DMA streams work correct if I execute them seperatlely -> reading in a certain number of samples at the first stream and afterwards enabling the second stream.

I will try to fix it by reducing the sample rate.

BR

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Re: External ADC & DMA

Postby Skadi » Tue Apr 04, 2017 2:05 pm

Hi,

I tried to fix my problem by reducing the sample rate, but it seems that's not the problem.

I get for both DMA streams the same result. One result just looks crappy because I have to bitshift the incoming data for both streams in a different way.

That's really confusing, because I allocated memory for each stream seperately:

Code: Select all

  chHeapObjectInit(&dma_heap_PD, (void*)0x30000000, 0x2710);
  buffer_PD =  chHeapAlloc(&dma_heap_PD, samples);

  chHeapObjectInit(&dma_heap_PE, (void*)0x20000000, 0x2710);
  buffer_PE =  chHeapAlloc(&dma_heap_PE, samples);
     
  dmaStreamSetMemory0( STM32_DMA2_STREAM2, buffer_PE);
  dmaStreamSetMemory0( STM32_DMA2_STREAM3, buffer_PD);
 


I also checked it with the debugger, memory 0 address registers are different for the used streams (2 & 3).

So my question is, how is it possible to receive the same result for both channels. Stream 2 should sample a sine-wave with 1 MHz and stream 3 one with 5 MHz.

By sending the fetched data from stream 2 to the PC, and afterwards enabling stream 3, the results are correct (see following code).

Code: Select all

  ....
  dmaStreamEnable(STM32_DMA2_STREAM2);
  netconn_write(conn, buffer_PE, samples, NETCONN_COPY);
   
  dmaStreamEnable(STM32_DMA2_STREAM3);
  netconn_write(conn, buffer_PD, samples, NETCONN_COPY);


By enabling both streams sequentially (two consecutive lines) and sending the data afterwards to the PC ends as described in the beginning.
Interestingly, if I add dmaWaitCompletion(dmastp) before the second stream is enabled (see below) the sampling of the previous stream (2) fails, because the number of data items to transfere NDTR are not decremented (without dmaWaitCompletion(dmastp) they are, checked with the debugger).

Code: Select all

  dmaStreamEnable(STM32_DMA2_STREAM2);
  dmaWaitCompletion(STM32_DMA2_STREAM2);
  dmaStreamEnable(STM32_DMA2_STREAM3);


Can anyone tell me what I have overlooked?

BR

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Re: External ADC & DMA

Postby Giovanni » Tue Apr 04, 2017 3:23 pm

Why are you allocating from an heap? just use a static array for buffer.

Giovanni

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Re: External ADC & DMA

Postby Skadi » Tue Apr 04, 2017 4:17 pm

Hi Giovanni,

the allocation was still left from the beginning, where I was struggling to set up the DMA. At that time I thought I have to allocate it from the heap.

I changed it to a static one. Now it works!!! Also enabling the two streams sequentially.

Thank you very much!!!

What is the big difference between a static memory and an allocated one, by means of operational overhead?

And why does the dmaWaitCompletion(dmastp) operation cause still a fault, by means of just decremneting NTR by one. So just one sample is fetched in, and all others are zero. The second stream (3) capture the correct data.

Code: Select all

 
  dmaStreamEnable(STM32_DMA2_STREAM2);
  dmaWaitCompletion(STM32_DMA2_STREAM2);
  dmaStreamEnable(STM32_DMA2_STREAM3);


Giovanni thank you very much :D !!!

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Re: External ADC & DMA

Postby Giovanni » Tue Apr 04, 2017 4:33 pm

There is no difference if the RAM bank is the same, probably allocation did not go as you expected.

Giovanni


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