STM32 support for High Speed SDIO?

[wgreiman]

Does anyone know about running SDIOCK faster than 48 MHz on STM32F4?

I recently found this function in the STM32Cube stm32f4xx_hal_sd.c file.

Code: Select all

/**
  * @brief  Switches the SD card to High Speed mode.
  *         This API must be used after "Transfer State"
  * @note   This operation should be followed by the configuration
  *         of PLL to have SDIOCK clock between 67 and 75 MHz
  * @param  hsd: SD handle
  * @retval SD Card error state
  */
HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd)


I can't find documentation about using STM32 with high speed SD cards so I just tried the ChibiOS 3.0 testhal SDC program.

I used a high speed microSD 16 GB card and tried different PLLQ values. I used a 32KB transfer size for multiple blocks.

Here is PLLQ = 7, the standard value that results in a 24 MHz clock at the SD card.

Connecting... OK

Card Info
CSD : 400E0032 5B590000 76B27F80 0A404012
CID : 03534453 4C313647 80254343 FC00E4AA
Mode : 11, SDV20
Capacity : 15193MB
Single block aligned read performance: 6392 blocks/S, 3272704 bytes/S
64 sequential blocks aligned read performance: 21760 blocks/S, 11141120 bytes/S
Single block unaligned read performance: 6407 blocks/S, 3280384 bytes/S
64 sequential blocks unaligned read performance: 6400 blocks/S, 3276800 bytes/S

Here is PLLQ = 5, for 33.6 MHz at the SD card.

Connecting... OK

Card Info
CSD : 400E0032 5B590000 76B27F80 0A404012
CID : 03534453 4C313647 80254343 FC00E4AA
Mode : 11, SDV20
Capacity : 15193MB
Single block aligned read performance: 6947 blocks/S, 3556864 bytes/S
64 sequential blocks aligned read performance: 29952 blocks/S, 15335424 bytes/S
Single block unaligned read performance: 6960 blocks/S, 3563520 bytes/S
64 sequential blocks unaligned read performance: 6976 blocks/S, 3571712 bytes/S

Finally I tried PLLQ = 4, for 42 MHz at the SD card. This is above the range of 67 to 75 MHz.

Connecting... OK

Card Info
CSD : 400E0032 5B590000 76B27F80 0A404012
CID : 03534453 4C313647 80254343 FC00E4AA
Mode : 11, SDV20
Capacity : 15193MB
Single block aligned read performance: 7270 blocks/S, 3722240 bytes/S
64 sequential blocks aligned read performance: 36928 blocks/S, 18907136 bytes/S
Single block unaligned read performance: 7277 blocks/S, 3725824 bytes/S
64 sequential blocks unaligned read performance: 7296 blocks/S, 3735552 bytes/S

The multiple block read speed is great. I will soon be trying this in a new C++ FAT library that I wrote. It is a follow on to the SdFat library I wrote for Arduino but is generic like FATFS.

[Giovanni]

Very interesting, does your FS have advantages over FatFS?

Giovanni

[wgreiman]

does your FS have advantages over FatFS?

FatFS has a long history so I don't expect many people to use my new FS. FatFS is a C program and has amazing support for long file names.

FatEmb (current working name) is written in C++ and I try to use a suitable subset of C++ such as described here http://www.phaedsys.com/principals/programmingresearch/prdata/JSF++_%20Rev_D_JUN07.pdf.

I provide several features similar to POSIX Real-time files. You can preallocate contiguous files and determine the location of the allocated blocks. This allows fast raw access to a file. If a file is on an SD, you can allocate and erase the file very quickly. You can use single block buffers when logging data to an SD and use a single multi-block write. This avoids data alignment problems and is very fast.

The API for this lower level file access class is based on the Unix man2 systems calls. I also implement a layer like the Unix Standard streams in man3. This provides high performance buffering for character based formatted I/O, getc, ungetc, etc.

Finally I have implemented classes with much of the functionality of C++ Standard Input/Output Streams.

I plan on supporting SD cards with SPI and SDIO. I also plan on supporting USB mass storage.

I have been playing more with the STM32F407 SDIO. I am using a 16GB MicroSDHC Class 10 UHS card. I put this card in high speed mode, not uhs-1 mode, and tried PLLQ = 3 which results in a card clock of 56 MHz. Read seems to work, no CRC error, with a transfer rate of 24.6 MB/sec. Wish I knew more about the 407 SDIO controller.

Card Info
CSD : 400E0032 5B590000 76B27F80 0A404012
CID : 03534453 4C313647 80254343 FC00E4AA
Mode : 11, SDV20
Capacity : 15193MB
Single block aligned read performance: 7615 blocks/S, 3898880 bytes/S
64 sequential blocks aligned read performance: 48128 blocks/S, 24641536 bytes/S
Single block unaligned read performance: 7636 blocks/S, 3909632 bytes/S
64 sequential blocks unaligned read performance: 7680 blocks/S, 3932160 bytes/S