pannel config help

daviddawe1982
Posts: 94
Joined: Thu Apr 11, 2013 10:35 am

pannel config help

Postby daviddawe1982 » Thu May 02, 2013 5:36 am

hello,
I have just received a new 7" lcd with a ssd1963 controller i have connected it as per the interface tutorial on chibios gfx site and double checked my connections.
all i am trying to do is initialize and clear the display but i just get a screen filled with multi colored pixels i think it may be some thing to do with my panel file i did revive the following info from the suppler

HDP=799; //Horizontal Display Period

HT=1000; //Horizontal Total

HPS=51; //LLINE Pulse Start Position

LPS=3; // Horizontal Display Period Start Position

HPW=8; // LLINE Pulse Width

VDP=479; //Vertical Display Period

VT=530; //Vertical Total

VPS=24; // LFRAME Pulse Start Position

FPS=23; //Vertical Display Period Start Positio

VPW=3; // LFRAME Pulse Width

i think i may be calculating the values for panel wrong
this is my panel file

Code: Select all

#define SCREEN_FPS 24ULL

//The following values are for a 4.3" TFT LCD

#define GDISP_SCREEN_WIDTH 800
#define GDISP_SCREEN_HEIGHT 480

#define SCREEN_HSYNC_BACK_PORCH      43
#define SCREEN_HSYNC_FRONT_PORCH   149
#define SCREEN_HSYNC_PULSE         16

#define SCREEN_VSYNC_BACK_PORCH      21
#define SCREEN_VSYNC_FRONT_PORCH   26
#define SCREEN_VSYNC_PULSE         6

#define   SCREEN_HSYNC_PERIOD   (SCREEN_HSYNC_PULSE + SCREEN_HSYNC_BACK_PORCH + GDISP_SCREEN_WIDTH  + SCREEN_HSYNC_FRONT_PORCH)
#define   SCREEN_VSYNC_PERIOD   (SCREEN_VSYNC_PULSE + SCREEN_VSYNC_BACK_PORCH + GDISP_SCREEN_HEIGHT + SCREEN_VSYNC_FRONT_PORCH)

#define SCREEN_PCLK   (SCREEN_HSYNC_PERIOD * SCREEN_VSYNC_PERIOD * SCREEN_FPS)
#define GDISP_FPR      ((SCREEN_PCLK * 1048576)/100000000)

#endif
/** @} */

and this is my board file if it helps

Code: Select all

#ifndef _GDISP_LLD_BOARD_H

#define _GDISP_LLD_BOARD_H



#define GDISP_REG              ((volatile uint16_t *) 0x60000000)[0] /* RS = 0 */

#define GDISP_RAM              ((volatile uint16_t *) 0x60020000)[0] /* RS = 1 */



#define SET_RST         palSetPad(GPIOD, 6)

#define CLR_RST         palClearPad(GPIOD, 6)



/**

 * @brief   Initialise the board for the display.

 * @notes   Performs the following functions:

 *         1. initialise the io port used by your display

 *         2. initialise the reset pin (initial state not-in-reset)

 *         3. initialise the chip select pin (initial state not-active)

 *         4. initialise the backlight pin (initial state back-light off)

 *

 * @notapi

 */

static __inline void init_board(void) {

   //const unsigned char FSMC_Bank = 0;

   

   #if defined(STM32F1XX) || defined(STM32F3XX)

      /* FSMC setup for F1/F3 */

      rccEnableAHB(RCC_AHBENR_FSMCEN, 0);



      #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)

         #error "DMA not implemented for F1/F3 Devices"

      #endif

   #elif defined(STM32F4XX) || defined(STM32F2XX)

      /* STM32F2-F4 FSMC init */

      rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);



      #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)

         if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) chSysHalt();

         dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);

         dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M); 

      #endif

   #else

      #error "FSMC not implemented for this device"

   #endif



   /* set pins to FSMC mode */

   IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |

                     (1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};



   IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |

                  (1 << 13) | (1 << 14) | (1 << 15), 0};



   palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));

   palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));



   /* FSMC timing */

   FSMC_Bank1->BTCR[1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \

         | (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \

         | (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;



   /* Bank1 NOR/SRAM control register configuration

    * This is actually not needed as already set by default after reset */

   FSMC_Bank1->BTCR[0] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;



        palSetPadMode(GPIOD, 6, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);

}



/**

 * @brief   Set or clear the lcd reset pin.

 *

 * @param[in] state      TRUE = lcd in reset, FALSE = normal operation

 *

 * @notapi

 */

static __inline void setpin_reset(bool_t state) {

    if(state)

        CLR_RST;

    else

        SET_RST;

}



/**

 * @brief   Set the lcd back-light level.

 *

 * @param[in] percent      0 to 100%

 *

 * @notapi

 */

static __inline void set_backlight(uint8_t percent) {

   (void) percent;

   /* Nothing to do here */

}



/**

 * @brief   Take exclusive control of the bus

 *

 * @notapi

 */

static __inline void acquire_bus(void) {

   /* Nothing to do here */

}



/**

 * @brief   Release exclusive control of the bus

 *

 * @notapi

 */

static __inline void release_bus(void) {

   /* Nothing to do here */

}



/**

 * @brief   Send data to the index register.

 *

 * @param[in] index      The index register to set

 *

 * @notapi

 */

static __inline void write_index(uint16_t index) { GDISP_REG = index; }



/**

 * @brief   Send data to the lcd.

 *

 * @param[in] data      The data to send

 *

 * @notapi

 */

static __inline void write_data(uint16_t data) { GDISP_RAM = data; }



#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)

/**

 * @brief   Read data from the lcd.

 *

 * @return   The data from the lcd

 * @note   The chip select may need to be asserted/de-asserted

 *          around the actual spi read

 *

 * @notapi

 */

static __inline uint16_t read_data(void) { return GDISP_RAM; }

#endif



#endif /* _GDISP_LLD_BOARD_H */

/** @} */

i am using a stm32f4 discovery
thanks

mobyfab
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Re: pannel config help

Postby mobyfab » Thu May 02, 2013 11:06 am

Hi,

Can you prodive your TFT panel's datasheet? That's the only way to get accurate setup data.

If you get the "multi color" pixels it means you panel is initialized but there is random data in the frame buffer, which is normal is you don't send anything.

This is most likely a problem with the FSMC address pin (A16) not connected correctly to the D/C pin.

You should use the example board file "gdisp_lld_board_example_fsmc.h" and modify it to your needs.

It seems like you use old code. Make sure you use the latest GFX code and templates.

daviddawe1982
Posts: 94
Joined: Thu Apr 11, 2013 10:35 am

Re: pannel config help

Postby daviddawe1982 » Thu May 02, 2013 1:19 pm

ok i have downloaded all fresh files and have checked that my rs is connected to PD11(FSMC_A16) as the tutorial stated and the board file that i am using is the example board file .
I don't know what parts i am meant to edit and the rs and fsmc in the example look good.
The info on the lcd is limited the data above if from the initialization code suppled i have attached the zip that was suppled to me.
Attachments
7.0.zip
lcd info
(713.63 KiB) Downloaded 246 times

mobyfab
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Re: pannel config help

Postby mobyfab » Thu May 02, 2013 1:43 pm

Code: Select all

#define SCREEN_FPS 60

#define GDISP_SCREEN_WIDTH 800
#define GDISP_SCREEN_HEIGHT 480

#define SCREEN_HSYNC_BACK_PORCH      46 /* 46 <-> 46 */
#define SCREEN_HSYNC_FRONT_PORCH   210 /* 16 <-> 364 */
#define SCREEN_HSYNC_PULSE         8 /* 1 <-> 40 */

#define SCREEN_VSYNC_BACK_PORCH      23 /* 23 <-> 23 */
#define SCREEN_VSYNC_FRONT_PORCH   22 /* 7 <-> 147 */
#define SCREEN_VSYNC_PULSE         8 /* 1 <-> 20 */

#define   SCREEN_HSYNC_PERIOD   (SCREEN_HSYNC_PULSE + SCREEN_HSYNC_BACK_PORCH + GDISP_SCREEN_WIDTH  + SCREEN_HSYNC_FRONT_PORCH)
#define   SCREEN_VSYNC_PERIOD   (SCREEN_VSYNC_PULSE + SCREEN_VSYNC_BACK_PORCH + GDISP_SCREEN_HEIGHT + SCREEN_VSYNC_FRONT_PORCH)

#define SCREEN_PCLK   (SCREEN_HSYNC_PERIOD * SCREEN_VSYNC_PERIOD * SCREEN_FPS)
#define GDISP_FPR      ((SCREEN_PCLK * 1048576)/100000000)


This should work.
Basically from the datasheet you need pixel clock, front porch, blanking (back porch) and pulse width.

I have changed the refresh time back to 60 FPS as this makes a pixel clock of 33.3Mhz which is the recommended value. There is no reason to set a lower pixel clock value.

These are not fixed values and can be changed a long a they stay within the limits from the datasheet. (I wrote the limits in the code)

For the templates, just use the example files and change the panel config, that should work out of the box. ("gdisp_lld_board_example_fsmc.h" and "gdisp_lld_panel_example.h")
Again, please make sure you use the latest code as the board file you posted is not the latest one. I suspect you use an old (broken) version of the driver.

daviddawe1982
Posts: 94
Joined: Thu Apr 11, 2013 10:35 am

Re: pannel config help

Postby daviddawe1982 » Thu May 02, 2013 2:01 pm

i use the panel setting you provided and i still get a display of multi colored pixels..
where is the best place to download the driver as i download from git repository and it says it was last updated 12 days ago

daviddawe1982
Posts: 94
Joined: Thu Apr 11, 2013 10:35 am

Re: pannel config help

Postby daviddawe1982 » Thu May 02, 2013 2:48 pm

and also i tested my rs pin and it goes high

mobyfab
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Re: pannel config help

Postby mobyfab » Thu May 02, 2013 2:53 pm

Can you post your board and panel files ?

Git has the latest code.

daviddawe1982
Posts: 94
Joined: Thu Apr 11, 2013 10:35 am

Re: pannel config help

Postby daviddawe1982 » Thu May 02, 2013 3:01 pm

here you go
panel

Code: Select all

#ifndef _GDISP_LLD_PANEL_H
#define _GDISP_LLD_PANEL_H

/* LCD panel specs */

/* The timings need to follow the datasheet for your particular TFT/LCD screen (the actual screen, not the controller)
*** Datasheets normally use a specific set of timings and acronyms, their value refers to the number of pixel clocks
** Non-display periods refer to pulses/timings that occur before or after the timings that actually put pixels on the screen
** Display periods refer to pulses/timings that directly put pixels on the screen
HDP: Horizontal Display Period, normally the width - 1 = 799
HT: Horizontal Total period (display + non-display) = 845
HPS: non-display period between the start of the horizontal sync (LLINE) signal and the first display data = 46
LPS: horizontal sync pulse (LLINE) start location in pixel clocks = 862
HPW: Horizontal sync Pulse Width 1 = 1
VDP: Vertical Display period, normally height - 1 = 479
VT: Vertical Total period (display + non-display) = 502
VPS: non-display period in lines between the start of the frame and the first display data in number of lines = 23
FPS: vertical sync pulse (LFRAME) start location in lines.
VPW: Vertical sync Pulse Width = 1

*** Here's how to convert them:
HPS = SCREEN_HSYNC_PULSE + SCREEN_HSYNC_BACK_PORCH
HT - HPS = GDISP_SCREEN_WIDTH + SCREEN_HSYNC_FRONT_PORCH
=>    SCREEN_HSYNC_FRONT_PORCH = ( HT - HPS ) - GDISP_SCREEN_WIDTH
   SCREEN_HSYNC_PULSE = HPW
   SCREEN_HSYNC_BACK_PORCH = HPS - HPW
   SCREEN_HSYNC_PERIOD = HT
   
VPS = SCREEN_VSYNC_PULSE + SCREEN_VSYNC_BACK_PORCH
VT - VPS = GDISP_SCREEN_HEIGHT + SCREEN_VSYNC_FRONT_PORCH
=>   SCREEN_VSYNC_FRONT_PORCH = ( VT - VPS ) - GDISP_SCREEN_HEIGHT
   SCREEN_VSYNC_PULSE = VPW
   SCREEN_VSYNC_BACK_PORCH = VPS - LPS
   SCREEN_VSYNC_PERIOD = VT
*/


//The following values are for a 4.3" TFT LCD
#define SCREEN_FPS 60ULL

#define GDISP_SCREEN_WIDTH 800
#define GDISP_SCREEN_HEIGHT 480

#define SCREEN_HSYNC_BACK_PORCH    46
#define SCREEN_HSYNC_FRONT_PORCH   210
#define SCREEN_HSYNC_PULSE         8

#define SCREEN_VSYNC_BACK_PORCH    23
#define SCREEN_VSYNC_FRONT_PORCH   22
#define SCREEN_VSYNC_PULSE         8

#define   SCREEN_HSYNC_PERIOD   (SCREEN_HSYNC_PULSE + SCREEN_HSYNC_BACK_PORCH + GDISP_SCREEN_WIDTH  + SCREEN_HSYNC_FRONT_PORCH)
#define   SCREEN_VSYNC_PERIOD   (SCREEN_VSYNC_PULSE + SCREEN_VSYNC_BACK_PORCH + GDISP_SCREEN_HEIGHT + SCREEN_VSYNC_FRONT_PORCH)

#define SCREEN_PCLK   (SCREEN_HSYNC_PERIOD * SCREEN_VSYNC_PERIOD * SCREEN_FPS)
#define GDISP_FPR      ((SCREEN_PCLK * 1048576)/100000000)

#endif
/** @} */

board

Code: Select all

#ifndef _GDISP_LLD_BOARD_H

#define _GDISP_LLD_BOARD_H



#if defined(GDISP_USE_GPIO)

   #define Set_CS      palSetPad(GDISP_CMD_PORT, GDISP_CS);

   #define Clr_CS      palClearPad(GDISP_CMD_PORT, GDISP_CS);

   #define Set_RS      palSetPad(GDISP_CMD_PORT, GDISP_RS);

   #define Clr_RS      palClearPad(GDISP_CMD_PORT, GDISP_RS);

   #define Set_WR      palSetPad(GDISP_CMD_PORT, GDISP_WR);

   #define Clr_WR      palClearPad(GDISP_CMD_PORT, GDISP_WR);

   #define Set_RD      palSetPad(GDISP_CMD_PORT, GDISP_RD);

   #define Clr_RD      palClearPad(GDISP_CMD_PORT, GDISP_RD);

#endif



#if defined(GDISP_USE_FSMC)

   /* Using FSMC A16 as RS */

   #define GDISP_REG              (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */

   #define GDISP_RAM              (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */

#endif



/**

 * @brief   Send data to the index register.

 *

 * @param[in] index      The index register to set

 *

 * @notapi

 */

static inline void write_index(uint16_t index) { GDISP_REG = index; }



/**

 * @brief   Send data to the lcd.

 *

 * @param[in] data      The data to send

 *

 * @notapi

 */

static inline void write_data(uint16_t data) { GDISP_RAM = data; }



/**

 * @brief   Initialise the board for the display.

 * @notes   Performs the following functions:

 *         1. initialise the io port used by your display

 *         2. initialise the reset pin (initial state not-in-reset)

 *         3. initialise the chip select pin (initial state not-active)

 *         4. initialise the backlight pin (initial state back-light off)

 *

 * @notapi

 */

static inline void init_board(void) {

   const unsigned char FSMC_Bank = 0;

   

   #if defined(STM32F1XX) || defined(STM32F3XX)

      /* FSMC setup for F1/F3 */

      rccEnableAHB(RCC_AHBENR_FSMCEN, 0);



      #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)

         #error "DMA not implemented for F1/F3 Devices"

      #endif

   #elif defined(STM32F4XX) || defined(STM32F2XX)

      /* STM32F2-F4 FSMC init */

      rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);



      #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)

         if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) chSysHalt();

         dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);

         dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M); 

      #endif

   #else

      #error "FSMC not implemented for this device"

   #endif



   /* set pins to FSMC mode */

   IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |

                     (1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};



   IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |

                  (1 << 13) | (1 << 14) | (1 << 15), 0};



   palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));

   palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));

   

   /* FSMC timing */

   FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \

         | (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \

         | (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;



   /* Bank1 NOR/SRAM control register configuration

    * This is actually not needed as already set by default after reset */

   FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;

}



static inline void post_init_board(void) {

   const unsigned char FSMC_Bank = 0;

   /* FSMC delay reduced as the controller now runs at full speed */

   FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;

   FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;

}



/**

 * @brief   Set or clear the lcd reset pin.

 *

 * @param[in] state      TRUE = lcd in reset, FALSE = normal operation

 *

 * @notapi

 */

static inline void setpin_reset(bool_t state) {

   (void) state;

   /* Nothing to do here */

}



/**

 * @brief   Set the lcd back-light level.

 *

 * @param[in] percent      0 to 100%

 *

 * @notapi

 */

static inline void set_backlight(uint8_t percent) {

   //duty_cycle is 00..FF

   //Work in progress: the SSD1963 has a built-in PWM, its output can

   //be used by a Dynamic Background Control or by a host (user)

   //Check your LCD's hardware, the PWM connection is default left open and instead

   //connected to a LED connection on the breakout board

   write_index(SSD1963_SET_PWM_CONF);//set PWM for BackLight

   write_data(0x0001);

   write_data(percent & 0x00FF);

   write_data(0x0001);//controlled by host (not DBC), enabled

   write_data(0x00FF);

   write_data(0x0060);//don't let it go too dark, avoid a useless LCD

   write_data(0x000F);//prescaler ???

}



/**

 * @brief   Take exclusive control of the bus

 *

 * @notapi

 */

static inline void acquire_bus(void) {

   /* Nothing to do here */

}



/**

 * @brief   Release exclusive control of the bus

 *

 * @notapi

 */

static inline void release_bus(void) {

   /* Nothing to do here */

}



#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)

/**

 * @brief   Read data from the lcd.

 *

 * @return   The data from the lcd

 * @note   The chip select may need to be asserted/de-asserted

 *          around the actual spi read

 *

 * @notapi

 */

static inline uint16_t read_data(void) { return GDISP_RAM; }

#endif



#endif /* _GDISP_LLD_BOARD_H */

/** @} */

mobyfab
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Re: pannel config help

Postby mobyfab » Thu May 02, 2013 3:08 pm

Okay, can you try to comment the code in the post_init_board function?

It speeds up the FSMC but it might be too fast for your hardware if you have some loose wires.

What crystal is there on your LCD board? The driver assumes 10Mhz.

daviddawe1982
Posts: 94
Joined: Thu Apr 11, 2013 10:35 am

Re: pannel config help

Postby daviddawe1982 » Thu May 02, 2013 3:18 pm

the post int board was it the lcd now displays i added some text from text example but it displays backwards..


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