Search found 135 matches
- Mon Feb 20, 2017 2:00 pm
- Forum: ChibiOS/RT
- Topic: Test suite issues with high-precision timer settings
- Replies: 9
- Views: 3795
Re: Test suite issues with high-precision timer settings
Imo these xx2ST() macros should be replaced by something more sophisticated, anyway. Depending on configuration and argument, the result of these macros might not fit the return type and is truncated without warning or anything. Personally this cost me some time debugging apparently correct code and...
- Mon Feb 20, 2017 10:42 am
- Forum: ChibiOS/RT
- Topic: Test suite issues with high-precision timer settings
- Replies: 9
- Views: 3795
Re: Test suite issues with high-precision timer settings
Thank you for sharing the link. :) As for the sleeping problem: Currently chThdSleep() takes systime_t as argument, which is the same type as the hardware timer. As a result, you can not specify a time frame that would cause the timer to overflow for this function, which I think is intended and shou...
- Fri Feb 17, 2017 3:02 pm
- Forum: ChibiOS/RT
- Topic: Test suite issues with high-precision timer settings
- Replies: 9
- Views: 3795
Re: Test suite issues with high-precision timer settings
RT4? I wasn't aware that you are redesigning the kernel again. Is there a list with planned features/changes? The new test suite sounds very nice, indeed :) Regarding the 16 bit timers: I did not mean to enhance the tests, so you can sleep for one second even if the configured frequency is too high....
- Fri Feb 17, 2017 2:12 pm
- Forum: ChibiOS/RT
- Topic: Test suite issues with high-precision timer settings
- Replies: 9
- Views: 3795
Re: Test suite issues with high-precision timer settings
Giovanni wrote: [CH_CFG_ST_TIMEDELTA] represents the intrinsic system jitter caused by ISRs and critical zones [and thus depends on CPU performance and implementation].
That sentence would be a nice addition to the CH_CFG_ST_TIMEDELTA description
Any comments on my other notes and offers?
- Fri Feb 17, 2017 11:53 am
- Forum: ChibiOS/RT
- Topic: Test suite issues with high-precision timer settings
- Replies: 9
- Views: 3795
Test suite issues with high-precision timer settings
Hi, I just ran in some issues when executing the TestThread() function (test/rt/test.c). In my chconf.h I configured the CH_CFG_ST_FREQUENCY to be 1000000 for microsecond precision, but on a STM32F1 with its 16 bit timer register, the ST timestamps will repeat every ~65 milliseconds. For my project ...
- Tue Feb 14, 2017 11:44 am
- Forum: Bug Reports
- Topic: STM32 RTCv1 not syncing corretly Topic is solved
- Replies: 3
- Views: 2764
STM32 RTCv1 not syncing corretly Topic is solved
Hi, I encountered an issue with the STM32/LLD/RTCv1 driver when setting a new date/time. The issue can be reproduced by first setting a new date using the rtcSetTime() function (which calls rtc_lld_set_time() ) and immediately reading the new value using rtcGetTime() (which calls rtc_lld_get_time() ...
- Tue Feb 07, 2017 5:09 pm
- Forum: ChibiOS/HAL
- Topic: I2C maximum clock speed macro
- Replies: 3
- Views: 2080
Re: I2C maximum clock speed macro
Hi, for now I am looking for runtime checks. I think I could calculate my values at compile time as well, but I still don't know what macros to use. You say I2C clock_speed is checked at compile time, but as I see it for the STM32/LLD/I2Cv1 driver, the clock_speed is only checked in i2c_lld_set_cloc...
- Tue Feb 07, 2017 3:33 pm
- Forum: ChibiOS/HAL
- Topic: I2C maximum clock speed macro
- Replies: 3
- Views: 2080
I2C maximum clock speed macro
Hi, this is merely a feature request than an issue. I am missing a macro to determine the maximum clock speed for I2C, depending on driver or port. For instance, in ADCv2/adc_lld.h the macro "STM32_ADCCLK_MAX" is defined and some ports override it with custom values. There is no such thing...
- Mon Feb 06, 2017 11:48 am
- Forum: STM32 Support
- Topic: STM32F405: GCC5 not working correctly
- Replies: 10
- Views: 4806
Re: STM32F405: GCC5 not working correctly
Update: I found that there is already a flag in the kernel, which does fix the issue for me. In file os/hal/ports/STM32/STM32F4xx/hal_lld.c in function stm32_clock_init() the preprocessor define "STM32_USE_REVISION_A_FIX" is checked. IMO this flag should either be much more pronounced in t...
- Fri Jan 27, 2017 10:46 am
- Forum: STM32 Support
- Topic: STM32F405: GCC5 not working correctly
- Replies: 10
- Views: 4806
Re: STM32F405: GCC5 not working correctly
Finally I found the reason for my problem! It seems to be a hardware issue, since I replaced the MCUs on some boards with new ones and with these the issue is gone. Furthermore, when I reduce the clock speed from 168MHz to 156MHz, the old ones become stable as well. Seems as if some part of the FPU ...