ChibiOS Free Embedded RTOS

Fixed the BTF clearing as bug #1045. thanks! I am still looking into implementing that "IRQ storm" handling concept. ok, thanks. If you need anything more from me on that then let me know. We've been running it for a while now and it is nice to know that if we do find another similar bug ...

It turns out this fix also fixed another long standing issue we've been chasing, which is lag on a uart gimbal on the Solo. The lag was caused by corrupted bytes on the uart due to the high ISR latency caused by the i2c interrupt storm on each i2c transaction. At 230400 baud we need to handle bytes ...

I've looked into why the timeout for I2C didn't save the vehicle, and it is pretty obvious. A timeout of osalThreadSuspendTimeoutS() will just activate the calling thread, but that thread will never get scheduled if an ISR is pending. So timeouts for peripherals don't work for the case of interrupt ...

Is the SW able to keep the vehicle flying in case of a watchdog reset? not for quadcopters. For a fixed wing aircraft we are able to restore enough to fly, and we have successfully demonstrated that: https://www.youtube.com/watch?v=ZGuTIPLI_e0 (video is in Italian) for safety reasons we don't re-ar...

SPI is way less critical than I2C, I think it has different failure modes too. The way it can fail is RX DMA not giving an interrupt so the thread remains stuck into the driver. It can be "guarded" using a timer (virtual or GPT). yes, this sort of storm is a lot less likely on SPI. It cou...

Wow, this is way simpler, does this replace the count/reset procedure safely? I still want to have the storm prevention code, so that when the next bug like this turns up we will find it. I suspect this bug has been lurking in ChibiOS for a long time, and costing people CPU cycles whenever a I2C de...

here is the patch that fixes it for me:
https://github.com/ArduPilot/ChibiOS/co ... 76394316af

The interesting thing is why this bug doesn't bite more often. It looks like on all I2C write-then-read transactions we will get continuous interrupts until the remote device acks the address. This doesn't actually seem to be specific to SMBus. So why aren't we crashing a lot more? Also, we always r...

Nope, anyway, it is strange it takes so many interrupts for a single transaction. I've now captured what is happening with a logic analyser: http://uav.tridgell.net/ChibiOS/ISR_Storm1.jpg I setup the I2C_ISR line to toggle on each ISR. The I2C_OP line goes high during a I2C transaction, then it has...

Giovanni wrote:Would be possible to try without DMA? that would rule out a bit of things.

we'd need to develop a non-DMA driver for I2Cv1 first, unless you already have one?