ChibiOS Free Embedded RTOS

It is likely a configuration issue You should use only SPIx_NSS line as Chip Select. And it must be configured into Alternate mode to behave as NSS pin of corresponding SPI module. Typically this is made in the board.h file. This spiStartSendI() will send a byte to the SPI buffer via DMA. It will n...

I'm not sure which chibi spi methods I should call to handle a transaction of data from the salve to the master. Here is example of how to use my SPI slave patch in ChibiOS applications. Example communicates with SPI master by means of tl_start_receive() and tl_start_send(). Additionally, assert_ds...

Hello! I have made some improvements in the exceptionvectors.c It allow to display a backtrace in the GDB if DEBUG_BACKTRACE defined. Additionally, HardFault_Handler() improved to show local variables by "i loc" even if optimization is enabled at Makefile. /* * If a serious error occurs, o...

Thanks for you attention Giovanni!

Hello! I have made very simple support for SPI slave. See attached archive with patches. It is already used for a while and it for sure will be useful for others. Irrespective to all talks above, I does not see any issues in its operation. Better to have such implementation then do not have it at all.

Dear Giovanni,

thank you very much!

I completely forget about lifetime of such variables and even does not pay attention to this fact.

Now everything works as expected.

Best wishes.
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Igor

Could you try spiSend() without callback? it returns when the transfer is over. Yes, Giovanni of course spiSend() works fine and does not distort data at any bitrate, but it is synchronous. I need to use asynchronous functions and understand why they does not work as expected or what is wrong made ...

Hello everybody! Please suggest how to understand what is going on and how to resolve issue. I use STM32F4xx platform (STM32F427VI at 180 MHz), ChibiOS_16.1.5 and have issue with SPI data integrity at low bitrates. Configuration and handling of SPI is following: SPIDriver *spi_drv_dac8562 = &SPI...

Dear all, in the ChibiOS_16.1.2, I have found a bug at icu_lld.c. If we use 32-bit timers like TIM2 or TIM5, then they are not able to measure long pulses. The ARR register overflows too early. So, here is a small patch which resolve this issue. --- a/ChibiOS_16.1.2/os/hal/ports/STM32/LLD/TIMv1/icu_...

Giovanni, thank you for support!

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Igor