Search found 825 matches
- Mon Aug 01, 2022 5:28 pm
- Forum: General Support
- Topic: I2C Slave mode support?
- Replies: 116
- Views: 73481
Re: I2C Slave mode support?
All but the most recent ST devices use one of two I2C hardware blocks, each with its own driver. (So I2CV1, I2CV2). You can tell which by looking at the device-specific make file - look in the directories under \os\hal\ports\STM32 (for 20.3.4, anyway). Judging by the minimal work involved in porting...
- Sun Jul 31, 2022 9:26 am
- Forum: General Support
- Topic: I2C Slave mode support?
- Replies: 116
- Views: 73481
Re: I2C Slave mode support?
I know this is a very old long thread but would like to ask why this seems not to be making it into upstream?:) I suspect because the code could do with a good cleanup after several people have updated and extended it. I've long felt that the V2 code is over-complicated, but since it works reliably...
- Wed Jul 06, 2022 1:14 pm
- Forum: General Support
- Topic: I2C Slave mode support?
- Replies: 116
- Views: 73481
Re: I2C Slave mode support?
I've never used the F103; IIRC I last used I2Cv1 slave code on the F4, which I stopped using a long time ago. AFAIK that should work on F103 as well. I last updated ChibiOS 19.1.3 (not sure how well it was tested), and have attached the updated files from there. The test harnesses I used are posted ...
- Wed Jul 06, 2022 1:05 pm
- Forum: General Support
- Topic: SPI Asynchronous DMA Topic is solved
- Replies: 4
- Views: 3135
Re: SPI Asynchronous DMA Topic is solved
Two possibilities that I can think of:
1. You can generate an interrupt each time SPI completes. Use that to start off the next transfer.
2. Use a spare hardware timer to generate interrupts at a faster rate.
1. You can generate an interrupt each time SPI completes. Use that to start off the next transfer.
2. Use a spare hardware timer to generate interrupts at a faster rate.
- Tue Apr 12, 2022 4:28 pm
- Forum: STM32 Support
- Topic: QSPI register corruption
- Replies: 14
- Views: 4699
Re: QSPI register corruption
Giovanni wrote:Could you try the "alternate" Cortex-M port? it is an entirely different approach to the problem, especially interrupts handling.
Giovanni
Looks to be Chibi 21 only. Would it backport to Chibi 20, or do I need to move my software forward? (I've been trying not to change too much!)
- Tue Apr 12, 2022 1:31 pm
- Forum: STM32 Support
- Topic: QSPI register corruption
- Replies: 14
- Views: 4699
Re: QSPI register corruption
No intentionally enabled fast interrupts (I think I might have checked for unintentional ones at some time, but I'll revisit that). And no stack overflows - at least not according to both the ChibiStudio plugin and a cruder check of my own. Its an F767, so I've got the stack guard enabled. I can con...
- Tue Mar 22, 2022 4:28 pm
- Forum: STM32 Support
- Topic: QSPI register corruption
- Replies: 14
- Views: 4699
Re: QSPI register corruption
Finally revisiting this project, to discover that ST have recently released an updated Errata (https://www.st.com/resource/en/errata_sheet/dm00257543-stm32f76xxx-and-stm32f77xxx-device-limitations-stmicroelectronics.pdf). Quite a lot of new stuff, with 2.4.4 having similarities to my problem: Memory...
- Fri Feb 11, 2022 2:03 pm
- Forum: Small Change Requests
- Topic: I-class Delegate Threads? Topic is solved
- Replies: 10
- Views: 5499
Re: I-class Delegate Threads? Topic is solved
I think I read somewhere that FreeRTOS has a construct similar to this, where from within an interrupt you could trigger the execution of any routine from within a thread. Not difficult to set up using event flags and a worker thread, but maybe there would be efficiencies derived from a specific con...
- Wed Dec 01, 2021 2:02 pm
- Forum: Small Change Requests
- Topic: can_lld_set_filters (stm32 CANv1) clobbers filters if called multiple times
- Replies: 3
- Views: 2757
Re: can_lld_set_filters (stm32 CANv1) clobbers filters if called multiple times
Have a look at the attached; think it contains some useful routines for setting single filters.
(Don't adopt it wholesale; it's not been brought up to date with latest Chibi version, and may have other surprises; but it does work)
(Don't adopt it wholesale; it's not been brought up to date with latest Chibi version, and may have other surprises; but it does work)
- Tue Oct 12, 2021 5:33 pm
- Forum: STM32 Support
- Topic: Firmware bypass using 2 i2c ports Topic is solved
- Replies: 9
- Views: 4097
Re: Firmware bypass using 2 i2c ports Topic is solved
There's an alternative I2C slave, originally written by genosensor, and modified by me for the later I2C ports, if you search