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by Giovanni
Tue Jul 28, 2020 7:50 pm
Forum: Bug Reports
Topic: ADCv3 fixes Topic is solved
Replies: 3
Views: 179

Re: ADCv3 fixes Topic is solved

Hi,

I am looking into this, the patch is not sufficient, AWD2 and AWD3 also have configuration registers to be initialized, I am adding those to the configuration structure.

Giovanni
by Giovanni
Mon Jul 27, 2020 6:56 am
Forum: General Support
Topic: Chibios I2C on Raspberry Pi Zero Errors
Replies: 1
Views: 88

Re: Chibios I2C on Raspberry Pi Zero Errors

Hi,

You best option is to ask to the author of the raspberry port, it is not part of ChibiOS main tree and I am unable to support it.

Giovanni
by Giovanni
Mon Jul 27, 2020 6:51 am
Forum: General Support
Topic: Link error, undefined symbol __main_thread_stack_base__ and __main_thread_stack_end__
Replies: 1
Views: 44

Re: Link error, undefined symbol __main_thread_stack_base__ and __main_thread_stack_end__

Hi,

Those needs to be exported by linker scripts, see "rules.ld" in the ARMCMx port.

Giovanni
by Giovanni
Sat Jul 25, 2020 3:54 pm
Forum: STM32 Support
Topic: QSPI register corruption
Replies: 4
Views: 191

Re: QSPI register corruption

QSPI is a pure master, I don't see ho the flash chip type can affect its operations.

It could be something electrical in nature causing glitches somehow, have you tried lowering QSPI clock frequency?

Giovanni
by Giovanni
Fri Jul 24, 2020 9:06 pm
Forum: STM32 Support
Topic: QSPI register corruption
Replies: 4
Views: 191

Re: QSPI register corruption

I don't see how the RTOS can change the AR register, it is possible that is the QSPI itself clearing it after entering a strange state, the CPU is not really writing it i think.

If you want to rule out the RTOS then you could try doing an RTOS-less test.

Fiovanni
by Giovanni
Fri Jul 24, 2020 10:31 am
Forum: Bug Reports
Topic: STM32H7 ADCv4 patches Topic is solved
Replies: 7
Views: 299

Re: STM32H7 ADCv4 patches Topic is solved

Hi,

Good work with all the patches (almost flawless). I had to change a reference to STM32_SYSCLK (undefined) to STM32_HCLK. I hope everything is OK now.

Fixed bug as #1117.

Giovanni
by Giovanni
Thu Jul 23, 2020 1:55 pm
Forum: Bug Reports
Topic: QSPI Erratum workaround Topic is solved
Replies: 9
Views: 196

Re: QSPI Erratum workaround Topic is solved

For the time being, fixed as bug #1116.

Giovanni
by Giovanni
Thu Jul 23, 2020 1:11 pm
Forum: Bug Reports
Topic: QSPI Erratum workaround Topic is solved
Replies: 9
Views: 196

Re: QSPI Erratum workaround Topic is solved

Did you place a breakpoint in the loop? There are a lot of conditions required for triggering the problem: - QUADSPI is used in indirect mode - QUADSPI clock is AHB/2 (PRESCALER = 0x01 in the QUADSPI_CR) - QUADSPI is in quad mode (DMODE = 0b11 in the QUADSPI_CCR) - QUADSPI is in DDR mode (DDRM = 0b1...
by Giovanni
Thu Jul 23, 2020 10:19 am
Forum: Bug Reports
Topic: QSPI Erratum workaround Topic is solved
Replies: 9
Views: 196

Re: QSPI Erratum workaround Topic is solved

I think there is one extra word at most, it looks like a glitch triggered by very specific clock conditions and settings.

Giovanni
by Giovanni
Thu Jul 23, 2020 8:44 am
Forum: Bug Reports
Topic: QSPI Erratum workaround Topic is solved
Replies: 9
Views: 196

Re: QSPI Erratum workaround Topic is solved

Hi I want to try the other workaround, it looks safer: discarding extra words. In order to do this we need to know if we are sending or receiving so I had to add extra driver states. I have no HW right now, could you try the following changes? in hal_lld_wspi.c: static void wspi_lld_serve_interrupt(...

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