Search found 291 matches

by alex31
Fri Jul 10, 2020 2:21 pm
Forum: General Support
Topic: strange coherency problem with dma buffer
Replies: 3
Views: 171

Re: strange coherency problem with dma buffer

Finally, volatile fixing the problem was sot sufficient, real problem belongs to DMA bandwidth, and seems to be fixed playing with DMA priority. ADC dma/irq priority == PWM dma/irq priority, no volatile : 7% of malformed dshot frame ADC dma/irq priority < PWM dma/irq priority, dma buffer not volatil...
by alex31
Wed Jul 08, 2020 9:20 pm
Forum: General Support
Topic: strange coherency problem with dma buffer
Replies: 3
Views: 171

strange coherency problem with dma buffer

Hello, My question is not chibios specific. I have received a bug report on open source software that i wrote, on a dshot driver which basically fill a buffer which is transmitted (DMA) to a timer in pwm mode to make a pulse coded numeric signal respecting the dshot protocol. The bug report is : 7% ...
by alex31
Wed Jul 01, 2020 11:01 am
Forum: Development and Feedback
Topic: Support for C11/C++11 thread local storage
Replies: 3
Views: 156

Re: Support for C11/C++11 thread local storage

the OS already supports mechanisms able to implement that. For example a private heap that is destroyed on thread termination (using hooks).


That's nice, can be useful for allocating memory from a dma compatible pool in a reentrant way. Is there any example of using this ?

Alexandre
by alex31
Sun May 10, 2020 12:45 pm
Forum: Development and Feedback
Topic: c++20 : semantic change of volatile keyword
Replies: 2
Views: 206

c++20 : semantic change of volatile keyword

Hello, GCC 10.1 is out, and with it, come fairly complete c++20 support. linux early adopter can try out arm-none-eabi-gcc-10.1 here : arm-none-eabi-gcc-10.1 archive One think that will hit embedded developper is the change relative to the volatile keyword: https://www.youtube.com/watch?v=KJW_DLaVXI...
by alex31
Sun May 10, 2020 12:04 pm
Forum: Development and Feedback
Topic: [PROBLEM] Dead PC...
Replies: 16
Views: 744

Re: [PROBLEM] Dead PC...

I need to buy one of those NAS too, it would be nice to have something running a Linux instance so I can use rsync and also have a subversion server at home. Giovanni I have a synology DS1511+, it's gnu/linux based and you can add synology maintained package, svn is part of the free offer. You can ...
by alex31
Sat May 09, 2020 10:35 pm
Forum: Development and Feedback
Topic: [PROBLEM] Dead PC...
Replies: 16
Views: 744

Re: [PROBLEM] Dead PC...

welcome back PC :-) NAS are now inexpensive, i have bought an used 5 bay raid NAS for few bucks, and I use rsnapshot for my (and my wife) backups, it's rough, minimal, use unix intrinsics like crontabs and hardlinks. if a disk begin to fail, the hotspare disk take the relay, the nas send me an email...
by alex31
Thu May 07, 2020 11:27 am
Forum: Development and Feedback
Topic: [PROBLEM] Dead PC...
Replies: 16
Views: 744

Re: [PROBLEM] Dead PC...

hope you had backup :-(

I wish you good luck with the repair !

Alexandre
by alex31
Thu Apr 30, 2020 8:19 am
Forum: Bug Reports
Topic: ICU driver and 32 bits timer
Replies: 16
Views: 1078

Re: ICU driver and 32 bits timer

Being able to set .arr is really handy, I and people of my team had take habit to set ARR after icuStart, so having .arr in the config would be a plus (your zero value of .arr handling is a good idea). Nevertheless, if .arr is not in the config, that will not stop user to set ARR, and this should no...
by alex31
Mon Apr 27, 2020 1:47 pm
Forum: Bug Reports
Topic: ICU driver and 32 bits timer
Replies: 16
Views: 1078

Re: ICU driver and 32 bits timer

Hi, Do you have a callback on overflow setup? No callback, but i don't think it's matter. Which MCU? F4 and F7, probably it's the same problem with all TIMv1 STM32 that expose tim2 and/or tim5 which are the 32 bits timers. Which TIM? I use tim2 but there should be the same problem with tim5 In fact,...
by alex31
Thu Apr 16, 2020 10:33 pm
Forum: Bug Reports
Topic: ICU driver and 32 bits timer
Replies: 16
Views: 1078

ICU driver and 32 bits timer

Hello, ICU driver behave the same with 32 bits timers than with 16 bits timer, is it by design ? If I want 32 bits timer with ICU to not overflow like a 16 bit timer, i have to manually set ICUDx.tim->ARR to 0xFFFFFFFF after icustart. Perhaps it should be done in hal_icu_lld.c if the timer is a 32 b...

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