Search found 264 matches

by alex31
Mon Apr 29, 2019 2:28 pm
Forum: STM32 Support
Topic: Need help with SPI and STM32F4Discovery
Replies: 10
Views: 193

Re: Need help with SPI and STM32F4Discovery

perhaps the problem is elsewhere ? are you sure you compile and flash that code ? are you sure flashing don't go wrong ? are you sure your code don't fail even before going into main Have you run your code within debugger to be sure ? alternatively you can modify the code in that way : call spiselec...
by alex31
Mon Apr 29, 2019 1:44 pm
Forum: STM32 Support
Topic: Where to start STM32H7 support
Replies: 148
Views: 12301

Re: Where to start STM32H7 support

Hello, looks like H7 support will become complicated. As I have read here, https://www.eevblog.com/forum/microcontrollers/stm32h7-series-revision-beware-of-the-changes!/ , new revisions of H7, while having the same part number, will be software incompatible with firsts versions ... finally, i'm glad...
by alex31
Mon Apr 29, 2019 1:39 pm
Forum: STM32 Support
Topic: Need help with SPI and STM32F4Discovery
Replies: 10
Views: 193

Re: Need help with SPI and STM32F4Discovery

that's strange.

are you sure to call initialiseDisplay function in you main ?
by alex31
Mon Apr 29, 2019 12:11 pm
Forum: STM32 Support
Topic: Need help with SPI and STM32F4Discovery
Replies: 10
Views: 193

Re: Need help with SPI and STM32F4Discovery

Hello, There is at least one bug in your code : sizeof(testSpiValue) * sizeof(uint16_t) : why ? you should just use sizeof(testSpiValue). Supplying length of 4 instead of 2 lead to buffer overflow. Then, slowing down the whole MCU to slow down SPI is not the usal way. usually, one use BR bit to set ...
by alex31
Wed Apr 24, 2019 4:09 pm
Forum: Small Change Requests
Topic: add checks for DMA cache synchronisation function
Replies: 2
Views: 198

add checks for DMA cache synchronisation function

Hello, More than one, I have been trapped by calling cacheBufferInvalidate or cacheBufferFlush with an unproperly aligned address. Is it possible to add an chDbgAssert in these 2 functions, that check that the 5 LSB of address are clear ? The effects of passing unaligned address can go from subtle b...
by alex31
Wed Apr 24, 2019 3:52 pm
Forum: Bug Reports
Topic: patch : fix dma_mask for F76X F77X I2C4_RX Topic is solved
Replies: 6
Views: 243

Re: patch : fix dma_mask for F76X F77X I2C4_RX Topic is solved

Hello, I have made tests on the target, and as usual, CUBE is right over RM, so your patch resolves the problem, thanks. There is another one line patch needed to use I2C4 on chibios 18.2 (its already OK on 19.x and trunk) : diff --git a/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c b/os/hal/ports/STM3...
by alex31
Mon Apr 22, 2019 2:33 pm
Forum: Bug Reports
Topic: patch : fix dma_mask for F76X F77X I2C4_RX Topic is solved
Replies: 6
Views: 243

Re: patch : fix dma_mask for F76X F77X I2C4_RX Topic is solved

Do you confirm? if so then I also need to remove (1, 5) from I2C4 RX. Did not verify on the reference manual, but that's what is in CUBEMX files : from cubemx (5.1.0) files for stm32f[6/7]xx : I2C4_TX : [stream(1, 5) Channel 2] I2C4_TX : [stream(1, 6) Channel 8] I2C4_RX : [stream(1, 1) Channel 8] I...
by alex31
Sat Apr 20, 2019 3:43 pm
Forum: STM32 Support
Topic: Debug bus CAN on a STM32F767 Nucleo 144
Replies: 4
Views: 134

Re: Debug bus CAN on a STM32F767 Nucleo 144

It's probably due to the fact that you use the wrong macro, the one to use is PAL_MODE_ALTERNATE (exported, documented) , not PAL_STM32_ALTERNATE (private). The definition of the macros explain themselves the problem better than i can do :-) #define PAL_STM32_ALTERNATE(n) ((n) << 7U) /** * @brief Al...
by alex31
Thu Apr 18, 2019 10:49 pm
Forum: Bug Reports
Topic: patch : fix dma_mask for F76X F77X I2C4_RX Topic is solved
Replies: 6
Views: 243

patch : fix dma_mask for F76X F77X I2C4_RX Topic is solved

Hello, STM32_DMA_STREAM_ID_MSK(1, 5) is a missing for STM32_I2C4_TX_DMA_MSK in 18.2, 19.1 and trunk patch for 18.2 : [code] [diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h index 124a57f92..ce9138395 100644 --- a/os/hal/ports/STM32/STM32F7xx...
by alex31
Wed Apr 10, 2019 10:27 am
Forum: ChibiOS/HAL
Topic: VMT interface between upper and lower level HAL
Replies: 9
Views: 402

Re: VMT interface between upper and lower level HAL

Hi, This is why I suggested it should be redesigned using C++ (a very very strict subset of). Giovanni I think this is a good idea, embedded C++ help to write code with more abstraction, more compile time checking, often with zero cost overhead, and sometime with negative overhead (in optimized mode...

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