OK thanks, I just figured since they had a fix merged in the issue (increase the timings slightly) that might be something that the ChibiOS HAL might have included as well.
Ill try the workaround and report.
Search found 78 matches
- Wed Sep 06, 2023 5:45 pm
- Forum: ChibiOS/HAL
- Topic: ADC Conversion sometimes 0
- Replies: 2
- Views: 2324
- Wed Sep 06, 2023 2:01 pm
- Forum: ChibiOS/HAL
- Topic: ADC Conversion sometimes 0
- Replies: 2
- Views: 2324
ADC Conversion sometimes 0
I might have run into an issue similar to this: https://github.com/stm32-rs/stm32l4xx-hal/issues/180 There are quite some errata sheets that point to something suspiciously similar to what I have been experiencing.. I'm using a STM32L496 where I have a bunch of ADCs connected. We have built hundreds...
- Thu Aug 25, 2022 10:28 am
- Forum: ChibiOS/RT
- Topic: Using a Mailbox increases thread callup timing
- Replies: 4
- Views: 1973
Re: Using a Mailbox increases thread callup timing
Hi Giovanni and faisal, thank you so much for your help, I really appreciate that! In the meantime I found another solution that works without any communication and comes with a shortcoming we can live with. That's why I cannot tell right now whether the queue approach works out. Anyway I learned th...
- Tue Aug 23, 2022 3:08 pm
- Forum: ChibiOS/RT
- Topic: Using a Mailbox increases thread callup timing
- Replies: 4
- Views: 1973
Using a Mailbox increases thread callup timing
Hi everyone, we implemented a new feature in our code that required a new mailbox. After hat we faced the issue that the thread-callup timings have increased. Not much, but enough to make a system-in-the-loop test fail. we filled the mailbox here in sender.c, which is located in Thread A: int send(u...
- Tue Mar 15, 2022 10:47 am
- Forum: ChibiOS/HAL
- Topic: Dynamic Flash Size for STM32L4
- Replies: 1
- Views: 1846
Dynamic Flash Size for STM32L4
Hi everyone, we're trying to make our efl_lld descriptor automatically get adjusted to the MCU we are using, since the L4 has different flash sizes. Due to the struct being const, we had to define a couple and then use an if/else to return the correct one: https://github.com/Stabl-Energy/ChibiOS/pul...
- Thu Feb 03, 2022 10:51 am
- Forum: Bug Reports
- Topic: #1198 breaks compilation for all STM496 with less than 169 pins Topic is solved
- Replies: 13
- Views: 4606
Re: #1198 breaks compilation for all STM496 with less than 169 pins Topic is solved
Can you elaborate on how to generate the board files as part of the build?
- Mon Jan 31, 2022 1:50 pm
- Forum: Bug Reports
- Topic: #1198 breaks compilation for all STM496 with less than 169 pins Topic is solved
- Replies: 13
- Views: 4606
Re: #1198 breaks compilation for all STM496 with less than 169 pins Topic is solved
Yeah we had this part in our board.c #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_ASCR, VAL_GPIOI_LOCKR}, #endif Which wasn't defined in the board.h, maybe we need to figure out how to fix that on...
- Fri Jan 28, 2022 5:28 pm
- Forum: Bug Reports
- Topic: #1198 breaks compilation for all STM496 with less than 169 pins Topic is solved
- Replies: 13
- Views: 4606
Re: #1198 breaks compilation for all STM496 with less than 169 pins Topic is solved
For example the STM32L496Vx Series, with the LQFO100 footprint. Whereas the STM32L496Ax series with UFBGA169 would work.
- Fri Jan 28, 2022 3:45 pm
- Forum: Bug Reports
- Topic: #1198 breaks compilation for all STM496 with less than 169 pins Topic is solved
- Replies: 13
- Views: 4606
#1198 breaks compilation for all STM496 with less than 169 pins Topic is solved
We're using 20.3.x, refer to this topic: viewtopic.php?f=35&t=5946
Basically the STM32_HAS_GPIOI flag was set to true for all STM496, but there are some packages that don't have a GPIOI.
Basically the STM32_HAS_GPIOI flag was set to true for all STM496, but there are some packages that don't have a GPIOI.
- Tue Jan 25, 2022 11:56 am
- Forum: Bug Reports
- Topic: 21.6.x branch, L422 RCC issue Topic is solved
- Replies: 4
- Views: 2426
Re: 21.6.x branch, L422 RCC issue Topic is solved
Fix #1198 breaks compilation for all STM496 (and maybe even L4A6) with less than 169 pins, since they don't have a GPIOI. Example Chip is the STM32L496Vx Series. Is there an elegant way to fix this? Our workaround is to revert this commit (sorry I can't navigate sourceforge that well): https://githu...