It may be worth using a diuagnostic rxchar callback in case it's a buffering issue. Possibly also worth reducing buffer size to less than the data size to ensure an end of buffer occurs.
Search found 44 matches
- Mon Oct 07, 2019 9:47 pm
- Forum: STM32 Support
- Topic: STM32F427 Ethernet support
- Replies: 3
- Views: 209
It's probably worth getting the processing working with a fairly similar board that's already well supported, perhaps the STM32F429 nucleo (https://www.st.com/en/evaluation-tools/nucleo-f429zi.html). That helps to ensure that you avoid problems with pin assignments etc. until you have a functioning ...
I've tended to avoid use of any sleeps, I prefer to suspend and resume threads so I can be more certain of the current state when code runs. I try to only use sleep when there's a problem (e.g. to blink an LED at a set rate). It might be worth developing code on a processor that allows more diagnost...
- Sat Sep 14, 2019 9:14 pm
- Forum: Development and Feedback
- Topic: [NOTES] Sandbox concept
- Replies: 16
- Views: 651
I think stdin, stdout and stderr would be an important link between the sandbox and the main system. The stderr route might benefit from being treated as a higher priority, perhaps options to have errors treated as either fatal (perhaps chSysHalt) or recoverable, where the sandbox might be terminate...
- Tue Sep 10, 2019 7:50 pm
- Forum: STM32 Support
- Topic: STM32F407 USB-CDC not working
- Replies: 10
- Views: 268
Windows has a habit of allocating different details for the same device plugged into a different port, and can sometimes leave settings in a mixed state. The 'other' device is possibly still showing if you enable the option to display hidden devices in device manager.
I don't think the original post included the processor family, I'd given my use of an F4 as an example, on the assumption that the processor in use would have had a similar capability.
STM32_EXT_EXTI4_15_IRQ_PRIORITY That's a shared interrupt, so may be in use for something else. As you have more than one interrupt in use at the same level, you will not have any control over the order they run. Are you able to use non shared interrupts, and can you make the most critical one run a...
12 cycles at 168MHz should be a lot less than the time I'm seeing, but there is some of my own processing. I'll have a check on this. The use of PENDSV might help with the jitter I see with SPI ADC (it's a single sample each transfer), so thanks for the hint. That's the interrupt I am thinking of ru...