Search found 7 matches

by rreignier
Sun Aug 25, 2019 11:05 am
Forum: Development and Feedback
Topic: [NEWS] Introducing MFS
Replies: 40
Views: 3806

Re: [NEWS] Introducing MFS

Ok, thank you.

There is a new version with a value of 1.
by rreignier
Sat Aug 24, 2019 5:26 pm
Forum: Development and Feedback
Topic: [NEWS] Introducing MFS
Replies: 40
Views: 3806

Re: [NEWS] Introducing MFS

I have written an EFL driver for F3 devices based on the F1 version. I have included a configuration for the Nucleo64 F302R8 in the EFL-MFS testhal but the MFS configuration has to be changed to something like the following to work: const MFSConfig mfscfg1 = { .flashp = (BaseFlash *)&EFLD1, .era...
by rreignier
Tue May 01, 2018 1:55 pm
Forum: Bug Reports
Topic: Make the L476 ADC demo work Topic is solved
Replies: 3
Views: 586

Re: Make the L476 ADC demo work Topic is solved

I have finally found the solution, there is a bug in GPIOv3, only the first bit of the ASCR register is set, see the following patch: diff --git a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c index c2dcf7b..e1f63d3 100644 --- a/os/hal/ports/STM32/LLD/GPIO...
by rreignier
Tue May 01, 2018 12:51 pm
Forum: Bug Reports
Topic: Make the L476 ADC demo work Topic is solved
Replies: 3
Views: 586

Make the L476 ADC demo work Topic is solved

Hi, I have been trying to get the STM32L4xx ADC demo (testhal/STM32/STM32L4xx/ADC) work on Nucleo64 L476RG board. I use the branch stable_18.2.x from the SVN. I have done the following changes to print the adc results on the serial port: diff --git a/testhal/STM32/STM32L4xx/ADC/main.c b/testhal/STM3...
by rreignier
Sun Apr 16, 2017 1:49 pm
Forum: Bug Reports
Topic: Incorrect flag in the GPT-ADC STM32L4xx testhal Topic is solved
Replies: 1
Views: 778

Incorrect flag in the GPT-ADC STM32L4xx testhal Topic is solved

In the current code from SVN, in the testhal/STM32/STM32L4xx/GPT-ADC/main.c The ADC conversion is not actually triggered by the timer but it is in Continuous mode because of the flag ADC_CFGR_CONT set in the configuration of the register CFGR line 80: https://sourceforge.net/p/chibios/svn/HEAD/tree/...
by rreignier
Sun Apr 16, 2017 1:07 pm
Forum: STM32 Support
Topic: How to properly activate the analog watchdog Topic is solved
Replies: 1
Views: 624

Re: How to properly activate the analog watchdog Topic is solved

Actually, I have just realized that it is only needed to add the ADC_CFGR_AWD1_ALL flag in the ADCConversionGroup structure! So something like that do the job: static const ADCConversionGroup adcgrpcfg = { TRUE, ADC_GRP1_NUM_CHANNELS, adccallback, adcerrorcallback, ADC_CFGR_CONT | ADC_CFGR_AWD1_ALL,...
by rreignier
Sun Apr 16, 2017 12:08 pm
Forum: STM32 Support
Topic: How to properly activate the analog watchdog Topic is solved
Replies: 1
Views: 624

How to properly activate the analog watchdog Topic is solved

Hello, I have tried to use the analog watchdog on a STM32F303K8, so it uses the ADCv3 driver. I have managed to use it by setting the AWD1EN bit of the CFGR register manually. Either with : adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); ADCD1.adcm->CFGR |= ADC_CFGR_AWD1...

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