Thanks!
There is code in crt0_v7m.S that initializes MSP. I added in my Makefile
UADEFS = -DCRT0_FORCE_MSP_INIT=TRUE
and now all seems to be good.
Search found 11 matches
- Thu Sep 14, 2017 11:34 am
- Forum: STM32 Support
- Topic: STM32F767 nDBOOT MSP Topic is solved
- Replies: 3
- Views: 2851
- Thu Sep 14, 2017 9:58 am
- Forum: STM32 Support
- Topic: STM32F767 nDBOOT MSP Topic is solved
- Replies: 3
- Views: 2851
STM32F767 nDBOOT MSP Topic is solved
Hello, I'm using STM32F767I, ChibiOS 17.6.0, arm-none-eabi-gcc 7.1.0 compiler. I'm trying to implement bootloader using nDBOOT and nDBANK option bits, but I'm having buffer overwrite problems. The problem appears to be that in USART interrupt handler the stack pointer of the IRQ handler points somew...
- Thu Aug 03, 2017 5:27 pm
- Forum: Bug Reports
- Topic: STM32F767II default CAN3 acceptance filter not properly set Topic is solved
- Replies: 1
- Views: 2300
STM32F767II default CAN3 acceptance filter not properly set Topic is solved
Hello, I'm using ChibiOS_17.6.0, STM32F767II board with enabled all 3 CANs. If I leave CAN3 with the default acceptance filters it won't receive any frames (in contrast CAN1 and CAN2 receive messages). The problem appears to be in hal_can_lld.c, lines 165-173. For CAND3, if there is CAN2 enabled, th...
- Sat May 13, 2017 6:26 pm
- Forum: STM32 Support
- Topic: GPT timer
- Replies: 2
- Views: 1934
Re: GPT timer
Thanks!
- Fri May 12, 2017 2:55 pm
- Forum: STM32 Support
- Topic: GPT timer
- Replies: 2
- Views: 1934
GPT timer
Hello, I try to measure the width of a pulse using a general purpose timer. The function is invoked as callback to the EXTD1 driver, triggers on EXTI2 event: void _extIRQ(EXTDriver *extp, expchannel_t channel) { if (_edgeChange == 0) { gptStartContinuous(&GPTD5, 0); //greatest possible reset val...
- Mon May 08, 2017 6:10 am
- Forum: STM32 Support
- Topic: osDelay(x) behaviour
- Replies: 2
- Views: 2129
Re: osDelay(x) behaviour
Thanks!
At my baud rate the transmission time is almost exactly 1ms per byte. I incorrectly assumed that sdWrite blocks until all has completed. But it blocks until the data byte goes in the transmission register TDR.
At my baud rate the transmission time is almost exactly 1ms per byte. I incorrectly assumed that sdWrite blocks until all has completed. But it blocks until the data byte goes in the transmission register TDR.
- Sun May 07, 2017 1:17 pm
- Forum: STM32 Support
- Topic: osDelay(x) behaviour
- Replies: 2
- Views: 2129
osDelay(x) behaviour
Hello, I can't explain the behavior of the following code, compiled on STM32F105 with Chibios 16.1.8: for (uint32_t i = 0; i < size; ++i) { sdWrite(DRV, &data[i], 1); osDelay(time); } Send data on the serial line, there should be a pause between each byte - time in ms When I observe the transmis...
- Sun May 07, 2017 1:03 pm
- Forum: Bug Reports
- Topic: compile error in 16.1.8 Topic is solved
- Replies: 1
- Views: 2410
compile error in 16.1.8 Topic is solved
Hello,
There is compile error in cmsis_os.c on line 189:
tp->state = CH_STATE_CURRENT;
Probably it should be:
tp->p_state = CH_STATE_CURRENT;
There is compile error in cmsis_os.c on line 189:
tp->state = CH_STATE_CURRENT;
Probably it should be:
tp->p_state = CH_STATE_CURRENT;
- Thu Feb 02, 2017 3:24 pm
- Forum: SPC56x Support
- Topic: serial errOverRun
- Replies: 5
- Views: 5399
Re: serial errOverRun
I added in the initial configuration of the driver for the Reception Data Field Length linflexp->UARTCR.B.RDFL_RFC = 3; //receive 4 bytes And in the RX ISR: sdIncomingDataI(sdp, sdp->linflexp->BDRM.B.DATA4); sdIncomingDataI(sdp, sdp->linflexp->BDRM.B.DATA5); sdIncomingDataI(sdp, sdp->linflexp->BDRM....
- Thu Feb 02, 2017 11:13 am
- Forum: SPC56x Support
- Topic: serial errOverRun
- Replies: 5
- Views: 5399
Re: serial errOverRun
It is configured at 160MHz, which should be maximum performance. I took that code from what S32 design studio generates -I don't suspect errors there but I'll dobule check it. Another project is communicating with the MCU at 1Mb/s without any overflow problems - but it doesn't use any OS and is comp...