Search found 380 matches
- Sat Jun 18, 2022 5:48 pm
- Forum: STM32 Support
- Topic: Halting debugger with IWDG
- Replies: 1
- Views: 1128
Re: Halting debugger with IWDG
If that didn't work on first try I'd disable the watchdog until I have my current debugging-session done. Or are you debugging something related to the watchdog?
- Tue Apr 12, 2022 10:22 am
- Forum: STM32 Support
- Topic: QSPI register corruption
- Replies: 14
- Views: 4675
Re: QSPI register corruption
He is not in memory mapped mode. Or at least trying not to use it.
Another way to debug this might be with data breakpoints. Not sure if you can trigger on a region... A quick research session hints at: no ranges allowed.
Another way to debug this might be with data breakpoints. Not sure if you can trigger on a region... A quick research session hints at: no ranges allowed.
- Wed Apr 06, 2022 3:21 pm
- Forum: STM32 Support
- Topic: Self-flashing STM32G030F
- Replies: 2
- Views: 1211
Re: Self-flashing STM32G030F
On a slightly related note... On older chips, you could program an already-programmed word to something that was bitwise smaller. So for example you could do 0xffff -> 0xfff3 -> 0xfff0 -> 0xff00 -> 0xf000 -> 0x0000. On these chips the specs say that the only allowed "reprogramming" is to v...
- Wed Apr 06, 2022 11:48 am
- Forum: STM32 Support
- Topic: Self-flashing STM32G030F
- Replies: 2
- Views: 1211
Self-flashing STM32G030F
HI, I'm saving a few parameters in flash (in this case normally only updated once when being installed in the field). Then I encountered this Heisenbug. With debugging enabled it worked, when disabled it didn't. Turns out its that one delay that does the trick... (the debug code is if (debug) {chpri...
- Tue Apr 05, 2022 10:34 am
- Forum: STM32 Support
- Topic: QSPI register corruption
- Replies: 14
- Views: 4675
Re: QSPI register corruption
The way I read it, you can also map a memory region as memory in the chip connected through QSPI. i.e. you just access memory at 0x...something and the hardware will push out a QSPI read cycle, wait for the results and sends off the CPU with the result when its done. Loads of waitstates, but for sca...
- Thu Oct 14, 2021 8:52 am
- Forum: STM32 Support
- Topic: STM32G030 support.
- Replies: 16
- Views: 6366
Re: STM32G030 support.
I understand that "not having hardware" is a problem. I just don't understand why you can't accept "let me send you some hardware then" as a solution ?Giovanni wrote:I will look into building G070 correctly, I cannot run code because I don't have any HW right now.
- Fri Sep 03, 2021 3:16 pm
- Forum: STM32 Support
- Topic: STM32G030 support.
- Replies: 16
- Views: 6366
Re: STM32G030 support.
I think that this is the nucleo that ST thinks should cover the 'G030 as well. https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-g031k8.html I have posted my current diff here: https://prive....
- Thu Sep 02, 2021 5:47 pm
- Forum: STM32 Support
- Topic: STM32G030 support.
- Replies: 16
- Views: 6366
Re: STM32G030 support.
I now have a basic application running on my development board. I have offered you before: if you want one of my development board, I can send it to you for free. (If you don't want to be sponsored, I'll have to think up a reasonable price and make it available for everybody. That's fine too.) Just ...
- Mon Aug 23, 2021 5:38 pm
- Forum: STM32 Support
- Topic: tutorial : place and run code in ram
- Replies: 6
- Views: 4055
Re: tutorial : place and run code in ram
When I enable "LTO", I see the compiler emitting complete gibberish that the linker somehow seems to understand and is able to process. I'm not sure if you can mix LTO and non-LTO functions.
- Mon Aug 23, 2021 4:51 pm
- Forum: STM32 Support
- Topic: STM32G030 support.
- Replies: 16
- Views: 6366
Re: STM32G030 support.
On STM32F030 the Io ports are enabled in the AHBENR, the STM32G030 has a separate registers IOPENR. I copied the STM32G071 nucleo example code, but this is also wrong in its board file: ./os/hal/boards/ST_NUCLEO64_G071RB/board.c I checked, it doesn't have the flags in the AHB_ENR and it has the sepa...